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- bif_dma_defs.h
/*
* This file is autogenerated from
* file: ../../inst/bif/rtl/bif_dma_regs.r
* id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
* last modfied: Mon Apr 11 16:06:33 2005
*
* by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_dma_defs.h ../../inst/bif/rtl/bif_dma_regs.r
* id: $Id: bif_dma_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
* Any changes here will be lost.
*
* -*- buffer-read-only: t -*-
*/
/* Main access macros */
REG_READ( reg_##scope##_##reg, \
(inst) + REG_RD_ADDR_##scope##_##reg )
REG_WRITE( reg_##scope##_##reg, \
(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
REG_READ( reg_##scope##_##reg, \
(inst) + REG_RD_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg )
REG_WRITE( reg_##scope##_##reg, \
(inst) + REG_WR_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg, (val) )
REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg )
REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg, (val) )
( { union { orgtype o; type n; } r; r.o = val; r.n; } )
( (inst) + REG_RD_ADDR_##scope##_##reg )
( (inst) + REG_RD_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg )
/* C-code for register scope bif_dma */
/* Register rw_ch0_ctrl, scope bif_dma, type rw */
typedef struct {
unsigned int bw : 2;
unsigned int burst_len : 1;
unsigned int cont : 1;
unsigned int end_pad : 1;
unsigned int cnt : 1;
unsigned int dreq_pin : 3;
unsigned int dreq_mode : 2;
unsigned int tc_in_pin : 3;
unsigned int tc_in_mode : 2;
unsigned int bus_mode : 2;
unsigned int rate_en : 1;
unsigned int wr_all : 1;
unsigned int dummy1 : 12;
} reg_bif_dma_rw_ch0_ctrl;
/* Register rw_ch0_addr, scope bif_dma, type rw */
typedef struct {
unsigned int addr : 32;
} reg_bif_dma_rw_ch0_addr;
/* Register rw_ch0_start, scope bif_dma, type rw */
typedef struct {
unsigned int run : 1;
unsigned int dummy1 : 31;
} reg_bif_dma_rw_ch0_start;
/* Register rw_ch0_cnt, scope bif_dma, type rw */
typedef struct {
unsigned int start_cnt : 16;
unsigned int dummy1 : 16;
} reg_bif_dma_rw_ch0_cnt;
/* Register r_ch0_stat, scope bif_dma, type r */
typedef struct {
unsigned int cnt : 16;
unsigned int dummy1 : 15;
unsigned int run : 1;
} reg_bif_dma_r_ch0_stat;
/* Register rw_ch1_ctrl, scope bif_dma, type rw */
typedef struct {
unsigned int bw : 2;
unsigned int burst_len : 1;
unsigned int cont : 1;
unsigned int end_discard : 1;
unsigned int cnt : 1;
unsigned int dreq_pin : 3;
unsigned int dreq_mode : 2;
unsigned int tc_in_pin : 3;
unsigned int tc_in_mode : 2;
unsigned int bus_mode : 2;
unsigned int rate_en : 1;
unsigned int dummy1 : 13;
} reg_bif_dma_rw_ch1_ctrl;
/* Register rw_ch1_addr, scope bif_dma, type rw */
typedef struct {
unsigned int addr : 32;
} reg_bif_dma_rw_ch1_addr;
/* Register rw_ch1_start, scope bif_dma, type rw */
typedef struct {
unsigned int run : 1;
unsigned int dummy1 : 31;
} reg_bif_dma_rw_ch1_start;
/* Register rw_ch1_cnt, scope bif_dma, type rw */
typedef struct {
unsigned int start_cnt : 16;
unsigned int dummy1 : 16;
} reg_bif_dma_rw_ch1_cnt;
/* Register r_ch1_stat, scope bif_dma, type r */
typedef struct {
unsigned int cnt : 16;
unsigned int dummy1 : 15;
unsigned int run : 1;
} reg_bif_dma_r_ch1_stat;
/* Register rw_ch2_ctrl, scope bif_dma, type rw */
typedef struct {
unsigned int bw : 2;
unsigned int burst_len : 1;
unsigned int cont : 1;
unsigned int end_pad : 1;
unsigned int cnt : 1;
unsigned int dreq_pin : 3;
unsigned int dreq_mode : 2;
unsigned int tc_in_pin : 3;
unsigned int tc_in_mode : 2;
unsigned int bus_mode : 2;
unsigned int rate_en : 1;
unsigned int wr_all : 1;
unsigned int dummy1 : 12;
} reg_bif_dma_rw_ch2_ctrl;
/* Register rw_ch2_addr, scope bif_dma, type rw */
typedef struct {
unsigned int addr : 32;
} reg_bif_dma_rw_ch2_addr;
/* Register rw_ch2_start, scope bif_dma, type rw */
typedef struct {
unsigned int run : 1;
unsigned int dummy1 : 31;
} reg_bif_dma_rw_ch2_start;
/* Register rw_ch2_cnt, scope bif_dma, type rw */
typedef struct {
unsigned int start_cnt : 16;
unsigned int dummy1 : 16;
} reg_bif_dma_rw_ch2_cnt;
/* Register r_ch2_stat, scope bif_dma, type r */
typedef struct {
unsigned int cnt : 16;
unsigned int dummy1 : 15;
unsigned int run : 1;
} reg_bif_dma_r_ch2_stat;
/* Register rw_ch3_ctrl, scope bif_dma, type rw */
typedef struct {
unsigned int bw : 2;
unsigned int burst_len : 1;
unsigned int cont : 1;
unsigned int end_discard : 1;
unsigned int cnt : 1;
unsigned int dreq_pin : 3;
unsigned int dreq_mode : 2;
unsigned int tc_in_pin : 3;
unsigned int tc_in_mode : 2;
unsigned int bus_mode : 2;
unsigned int rate_en : 1;
unsigned int dummy1 : 13;
} reg_bif_dma_rw_ch3_ctrl;
/* Register rw_ch3_addr, scope bif_dma, type rw */
typedef struct {
unsigned int addr : 32;
} reg_bif_dma_rw_ch3_addr;
/* Register rw_ch3_start, scope bif_dma, type rw */
typedef struct {
unsigned int run : 1;
unsigned int dummy1 : 31;
} reg_bif_dma_rw_ch3_start;
/* Register rw_ch3_cnt, scope bif_dma, type rw */
typedef struct {
unsigned int start_cnt : 16;
unsigned int dummy1 : 16;
} reg_bif_dma_rw_ch3_cnt;
/* Register r_ch3_stat, scope bif_dma, type r */
typedef struct {
unsigned int cnt : 16;
unsigned int dummy1 : 15;
unsigned int run : 1;
} reg_bif_dma_r_ch3_stat;
/* Register rw_intr_mask, scope bif_dma, type rw */
typedef struct {
unsigned int ext_dma0 : 1;
unsigned int ext_dma1 : 1;
unsigned int ext_dma2 : 1;
unsigned int ext_dma3 : 1;
unsigned int dummy1 : 28;
} reg_bif_dma_rw_intr_mask;
/* Register rw_ack_intr, scope bif_dma, type rw */
typedef struct {
unsigned int ext_dma0 : 1;
unsigned int ext_dma1 : 1;
unsigned int ext_dma2 : 1;
unsigned int ext_dma3 : 1;
unsigned int dummy1 : 28;
} reg_bif_dma_rw_ack_intr;
/* Register r_intr, scope bif_dma, type r */
typedef struct {
unsigned int ext_dma0 : 1;
unsigned int ext_dma1 : 1;
unsigned int ext_dma2 : 1;
unsigned int ext_dma3 : 1;
unsigned int dummy1 : 28;
} reg_bif_dma_r_intr;
/* Register r_masked_intr, scope bif_dma, type r */
typedef struct {
unsigned int ext_dma0 : 1;
unsigned int ext_dma1 : 1;
unsigned int ext_dma2 : 1;
unsigned int ext_dma3 : 1;
unsigned int dummy1 : 28;
} reg_bif_dma_r_masked_intr;
/* Register rw_pin0_cfg, scope bif_dma, type rw */
typedef struct {
unsigned int master_ch : 2;
unsigned int master_mode : 3;
unsigned int slave_ch : 2;
unsigned int slave_mode : 3;
unsigned int dummy1 : 22;
} reg_bif_dma_rw_pin0_cfg;
/* Register rw_pin1_cfg, scope bif_dma, type rw */
typedef struct {
unsigned int master_ch : 2;
unsigned int master_mode : 3;
unsigned int slave_ch : 2;
unsigned int slave_mode : 3;
unsigned int dummy1 : 22;
} reg_bif_dma_rw_pin1_cfg;
/* Register rw_pin2_cfg, scope bif_dma, type rw */
typedef struct {
unsigned int master_ch : 2;
unsigned int master_mode : 3;
unsigned int slave_ch : 2;
unsigned int slave_mode : 3;
unsigned int dummy1 : 22;
} reg_bif_dma_rw_pin2_cfg;
/* Register rw_pin3_cfg, scope bif_dma, type rw */
typedef struct {
unsigned int master_ch : 2;
unsigned int master_mode : 3;
unsigned int slave_ch : 2;
unsigned int slave_mode : 3;
unsigned int dummy1 : 22;
} reg_bif_dma_rw_pin3_cfg;
/* Register rw_pin4_cfg, scope bif_dma, type rw */
typedef struct {
unsigned int master_ch : 2;
unsigned int master_mode : 3;
unsigned int slave_ch : 2;
unsigned int slave_mode : 3;
unsigned int dummy1 : 22;
} reg_bif_dma_rw_pin4_cfg;
/* Register rw_pin5_cfg, scope bif_dma, type rw */
typedef struct {
unsigned int master_ch : 2;
unsigned int master_mode : 3;
unsigned int slave_ch : 2;
unsigned int slave_mode : 3;
unsigned int dummy1 : 22;
} reg_bif_dma_rw_pin5_cfg;
/* Register rw_pin6_cfg, scope bif_dma, type rw */
typedef struct {
unsigned int master_ch : 2;
unsigned int master_mode : 3;
unsigned int slave_ch : 2;
unsigned int slave_mode : 3;
unsigned int dummy1 : 22;
} reg_bif_dma_rw_pin6_cfg;
/* Register rw_pin7_cfg, scope bif_dma, type rw */
typedef struct {
unsigned int master_ch : 2;
unsigned int master_mode : 3;
unsigned int slave_ch : 2;
unsigned int slave_mode : 3;
unsigned int dummy1 : 22;
} reg_bif_dma_rw_pin7_cfg;
/* Register r_pin_stat, scope bif_dma, type r */
typedef struct {
unsigned int pin0 : 1;
unsigned int pin1 : 1;
unsigned int pin2 : 1;
unsigned int pin3 : 1;
unsigned int pin4 : 1;
unsigned int pin5 : 1;
unsigned int pin6 : 1;
unsigned int pin7 : 1;
unsigned int dummy1 : 24;
} reg_bif_dma_r_pin_stat;
/* Constants */
enum {
regk_bif_dma_as_master = 0x00000001,
regk_bif_dma_as_slave = 0x00000001,
regk_bif_dma_burst1 = 0x00000000,
regk_bif_dma_burst8 = 0x00000001,
regk_bif_dma_bw16 = 0x00000001,
regk_bif_dma_bw32 = 0x00000002,
regk_bif_dma_bw8 = 0x00000000,
regk_bif_dma_dack = 0x00000006,
regk_bif_dma_dack_inv = 0x00000007,
regk_bif_dma_force = 0x00000001,
regk_bif_dma_hi = 0x00000003,
regk_bif_dma_inv = 0x00000003,
regk_bif_dma_lo = 0x00000002,
regk_bif_dma_master = 0x00000001,
regk_bif_dma_no = 0x00000000,
regk_bif_dma_norm = 0x00000002,
regk_bif_dma_off = 0x00000000,
regk_bif_dma_rw_ch0_ctrl_default = 0x00000000,
regk_bif_dma_rw_ch0_start_default = 0x00000000,
regk_bif_dma_rw_ch1_ctrl_default = 0x00000000,
regk_bif_dma_rw_ch1_start_default = 0x00000000,
regk_bif_dma_rw_ch2_ctrl_default = 0x00000000,
regk_bif_dma_rw_ch2_start_default = 0x00000000,
regk_bif_dma_rw_ch3_ctrl_default = 0x00000000,
regk_bif_dma_rw_ch3_start_default = 0x00000000,
regk_bif_dma_rw_intr_mask_default = 0x00000000,
regk_bif_dma_rw_pin0_cfg_default = 0x00000000,
regk_bif_dma_rw_pin1_cfg_default = 0x00000000,
regk_bif_dma_rw_pin2_cfg_default = 0x00000000,
regk_bif_dma_rw_pin3_cfg_default = 0x00000000,
regk_bif_dma_rw_pin4_cfg_default = 0x00000000,
regk_bif_dma_rw_pin5_cfg_default = 0x00000000,
regk_bif_dma_rw_pin6_cfg_default = 0x00000000,
regk_bif_dma_rw_pin7_cfg_default = 0x00000000,
regk_bif_dma_slave = 0x00000002,
regk_bif_dma_sreq = 0x00000006,
regk_bif_dma_sreq_inv = 0x00000007,
regk_bif_dma_tc = 0x00000004,
regk_bif_dma_tc_inv = 0x00000005,
regk_bif_dma_yes = 0x00000001
};
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