// Copyright 2016 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. (AddPtr x y) -> (ADD x y) (Add32 x y) -> (ADD x y) (Add16 x y) -> (ADD x y) (Add8 x y) -> (ADD x y) (Add32F x y) -> (ADDF x y) (Add64F x y) -> (ADDD x y) (Add32carry x y) -> (ADDS x y) (Add32withcarry x y c) -> (ADC x y c) (SubPtr x y) -> (SUB x y) (Sub32 x y) -> (SUB x y) (Sub16 x y) -> (SUB x y) (Sub8 x y) -> (SUB x y) (Sub32F x y) -> (SUBF x y) (Sub64F x y) -> (SUBD x y) (Sub32carry x y) -> (SUBS x y) (Sub32withcarry x y c) -> (SBC x y c) (Mul32 x y) -> (MUL x y) (Mul16 x y) -> (MUL x y) (Mul8 x y) -> (MUL x y) (Mul32F x y) -> (MULF x y) (Mul64F x y) -> (MULD x y) (Hmul32 x y) -> (HMUL x y) (Hmul32u x y) -> (HMULU x y) (Mul32uhilo x y) -> (MULLU x y) (Div32 x y) -> (SUB (XOR <typ.UInt32> // negate the result if one operand is negative (Select0 <typ.UInt32> (CALLudiv (SUB <typ.UInt32> (XOR x <typ.UInt32> (Signmask x)) (Signmask x)) // negate x if negative (SUB <typ.UInt32> (XOR y <typ.UInt32> (Signmask y)) (Signmask y)))) // negate y if negative (Signmask (XOR <typ.UInt32> x y))) (Signmask (XOR <typ.UInt32> x y))) (Div32u x y) -> (Select0 <typ.UInt32> (CALLudiv x y)) (Div16 x y) -> (Div32 (SignExt16to32 x) (SignExt16to32 y)) (Div16u x y) -> (Div32u (ZeroExt16to32 x) (ZeroExt16to32 y)) (Div8 x y) -> (Div32 (SignExt8to32 x) (SignExt8to32 y)) (Div8u x y) -> (Div32u (ZeroExt8to32 x) (ZeroExt8to32 y)) (Div32F x y) -> (DIVF x y) (Div64F x y) -> (DIVD x y) (Mod32 x y) -> (SUB (XOR <typ.UInt32> // negate the result if x is negative (Select1 <typ.UInt32> (CALLudiv (SUB <typ.UInt32> (XOR <typ.UInt32> x (Signmask x)) (Signmask x)) // negate x if negative (SUB <typ.UInt32> (XOR <typ.UInt32> y (Signmask y)) (Signmask y)))) // negate y if negative (Signmask x)) (Signmask x)) (Mod32u x y) -> (Select1 <typ.UInt32> (CALLudiv x y)) (Mod16 x y) -> (Mod32 (SignExt16to32 x) (SignExt16to32 y)) (Mod16u x y) -> (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y)) (Mod8 x y) -> (Mod32 (SignExt8to32 x) (SignExt8to32 y)) (Mod8u x y) -> (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y)) // (x + y) / 2 with x>=y -> (x - y) / 2 + y (Avg32u <t> x y) -> (ADD (SRLconst <t> (SUB <t> x y) [1]) y) (And32 x y) -> (AND x y) (And16 x y) -> (AND x y) (And8 x y) -> (AND x y) (Or32 x y) -> (OR x y) (Or16 x y) -> (OR x y) (Or8 x y) -> (OR x y) (Xor32 x y) -> (XOR x y) (Xor16 x y) -> (XOR x y) (Xor8 x y) -> (XOR x y) // unary ops (Neg32 x) -> (RSBconst [0] x) (Neg16 x) -> (RSBconst [0] x) (Neg8 x) -> (RSBconst [0] x) (Neg32F x) -> (NEGF x) (Neg64F x) -> (NEGD x) (Com32 x) -> (MVN x) (Com16 x) -> (MVN x) (Com8 x) -> (MVN x) (Sqrt x) -> (SQRTD x) // count trailing zero for ARMv5 and ARMv6 // 32 - CLZ(x&-x - 1) (Ctz32 <t> x) && objabi.GOARM<=6 -> (RSBconst [32] (CLZ <t> (SUBconst <t> (AND <t> x (RSBconst <t> [0] x)) [1]))) // count trailing zero for ARMv7 (Ctz32 <t> x) && objabi.GOARM==7 -> (CLZ <t> (RBIT <t> x)) // bit length (BitLen32 <t> x) -> (RSBconst [32] (CLZ <t> x)) // byte swap for ARMv5 // let (a, b, c, d) be the bytes of x from high to low // t1 = x right rotate 16 bits -- (c, d, a, b ) // t2 = x ^ t1 -- (a^c, b^d, a^c, b^d) // t3 = t2 &^ 0xff0000 -- (a^c, 0, a^c, b^d) // t4 = t3 >> 8 -- (0, a^c, 0, a^c) // t5 = x right rotate 8 bits -- (d, a, b, c ) // result = t4 ^ t5 -- (d, c, b, a ) // using shifted ops this can be done in 4 instructions. (Bswap32 <t> x) && objabi.GOARM==5 -> (XOR <t> (SRLconst <t> (BICconst <t> (XOR <t> x (SRRconst <t> [16] x)) [0xff0000]) [8]) (SRRconst <t> x [8])) // byte swap for ARMv6 and above (Bswap32 x) && objabi.GOARM>=6 -> (REV x) // boolean ops -- booleans are represented with 0=false, 1=true (AndB x y) -> (AND x y) (OrB x y) -> (OR x y) (EqB x y) -> (XORconst [1] (XOR <typ.Bool> x y)) (NeqB x y) -> (XOR x y) (Not x) -> (XORconst [1] x) // shifts // hardware instruction uses only the low byte of the shift // we compare to 256 to ensure Go semantics for large shifts (Lsh32x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) (Lsh32x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) (Lsh32x8 x y) -> (SLL x (ZeroExt8to32 y)) (Lsh16x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) (Lsh16x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) (Lsh16x8 x y) -> (SLL x (ZeroExt8to32 y)) (Lsh8x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) (Lsh8x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) (Lsh8x8 x y) -> (SLL x (ZeroExt8to32 y)) (Rsh32Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> x y) (CMPconst [256] y) [0]) (Rsh32Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) (Rsh32Ux8 x y) -> (SRL x (ZeroExt8to32 y)) (Rsh16Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) y) (CMPconst [256] y) [0]) (Rsh16Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) (Rsh16Ux8 x y) -> (SRL (ZeroExt16to32 x) (ZeroExt8to32 y)) (Rsh8Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) y) (CMPconst [256] y) [0]) (Rsh8Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) (Rsh8Ux8 x y) -> (SRL (ZeroExt8to32 x) (ZeroExt8to32 y)) (Rsh32x32 x y) -> (SRAcond x y (CMPconst [256] y)) (Rsh32x16 x y) -> (SRAcond x (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) (Rsh32x8 x y) -> (SRA x (ZeroExt8to32 y)) (Rsh16x32 x y) -> (SRAcond (SignExt16to32 x) y (CMPconst [256] y)) (Rsh16x16 x y) -> (SRAcond (SignExt16to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) (Rsh16x8 x y) -> (SRA (SignExt16to32 x) (ZeroExt8to32 y)) (Rsh8x32 x y) -> (SRAcond (SignExt8to32 x) y (CMPconst [256] y)) (Rsh8x16 x y) -> (SRAcond (SignExt8to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) (Rsh8x8 x y) -> (SRA (SignExt8to32 x) (ZeroExt8to32 y)) // constant shifts // generic opt rewrites all constant shifts to shift by Const64 (Lsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SLLconst x [c]) (Rsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SRAconst x [c]) (Rsh32Ux64 x (Const64 [c])) && uint64(c) < 32 -> (SRLconst x [c]) (Lsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SLLconst x [c]) (Rsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SRAconst (SLLconst <typ.UInt32> x [16]) [c+16]) (Rsh16Ux64 x (Const64 [c])) && uint64(c) < 16 -> (SRLconst (SLLconst <typ.UInt32> x [16]) [c+16]) (Lsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SLLconst x [c]) (Rsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SRAconst (SLLconst <typ.UInt32> x [24]) [c+24]) (Rsh8Ux64 x (Const64 [c])) && uint64(c) < 8 -> (SRLconst (SLLconst <typ.UInt32> x [24]) [c+24]) // large constant shifts (Lsh32x64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) (Rsh32Ux64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) (Lsh16x64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) (Rsh16Ux64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) (Lsh8x64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) (Rsh8Ux64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) // large constant signed right shift, we leave the sign bit (Rsh32x64 x (Const64 [c])) && uint64(c) >= 32 -> (SRAconst x [31]) (Rsh16x64 x (Const64 [c])) && uint64(c) >= 16 -> (SRAconst (SLLconst <typ.UInt32> x [16]) [31]) (Rsh8x64 x (Const64 [c])) && uint64(c) >= 8 -> (SRAconst (SLLconst <typ.UInt32> x [24]) [31]) // constants (Const8 [val]) -> (MOVWconst [val]) (Const16 [val]) -> (MOVWconst [val]) (Const32 [val]) -> (MOVWconst [val]) (Const32F [val]) -> (MOVFconst [val]) (Const64F [val]) -> (MOVDconst [val]) (ConstNil) -> (MOVWconst [0]) (ConstBool [b]) -> (MOVWconst [b]) // truncations // Because we ignore high parts of registers, truncates are just copies. (Trunc16to8 x) -> x (Trunc32to8 x) -> x (Trunc32to16 x) -> x // Zero-/Sign-extensions (ZeroExt8to16 x) -> (MOVBUreg x) (ZeroExt8to32 x) -> (MOVBUreg x) (ZeroExt16to32 x) -> (MOVHUreg x) (SignExt8to16 x) -> (MOVBreg x) (SignExt8to32 x) -> (MOVBreg x) (SignExt16to32 x) -> (MOVHreg x) (Signmask x) -> (SRAconst x [31]) (Zeromask x) -> (SRAconst (RSBshiftRL <typ.Int32> x x [1]) [31]) // sign bit of uint32(x)>>1 - x (Slicemask <t> x) -> (SRAconst (RSBconst <t> [0] x) [31]) // float <-> int conversion (Cvt32to32F x) -> (MOVWF x) (Cvt32to64F x) -> (MOVWD x) (Cvt32Uto32F x) -> (MOVWUF x) (Cvt32Uto64F x) -> (MOVWUD x) (Cvt32Fto32 x) -> (MOVFW x) (Cvt64Fto32 x) -> (MOVDW x) (Cvt32Fto32U x) -> (MOVFWU x) (Cvt64Fto32U x) -> (MOVDWU x) (Cvt32Fto64F x) -> (MOVFD x) (Cvt64Fto32F x) -> (MOVDF x) (Round32F x) -> x (Round64F x) -> x // comparisons (Eq8 x y) -> (Equal (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) (Eq16 x y) -> (Equal (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) (Eq32 x y) -> (Equal (CMP x y)) (EqPtr x y) -> (Equal (CMP x y)) (Eq32F x y) -> (Equal (CMPF x y)) (Eq64F x y) -> (Equal (CMPD x y)) (Neq8 x y) -> (NotEqual (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) (Neq16 x y) -> (NotEqual (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) (Neq32 x y) -> (NotEqual (CMP x y)) (NeqPtr x y) -> (NotEqual (CMP x y)) (Neq32F x y) -> (NotEqual (CMPF x y)) (Neq64F x y) -> (NotEqual (CMPD x y)) (Less8 x y) -> (LessThan (CMP (SignExt8to32 x) (SignExt8to32 y))) (Less16 x y) -> (LessThan (CMP (SignExt16to32 x) (SignExt16to32 y))) (Less32 x y) -> (LessThan (CMP x y)) (Less32F x y) -> (GreaterThan (CMPF y x)) // reverse operands to work around NaN (Less64F x y) -> (GreaterThan (CMPD y x)) // reverse operands to work around NaN (Less8U x y) -> (LessThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) (Less16U x y) -> (LessThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) (Less32U x y) -> (LessThanU (CMP x y)) (Leq8 x y) -> (LessEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) (Leq16 x y) -> (LessEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) (Leq32 x y) -> (LessEqual (CMP x y)) (Leq32F x y) -> (GreaterEqual (CMPF y x)) // reverse operands to work around NaN (Leq64F x y) -> (GreaterEqual (CMPD y x)) // reverse operands to work around NaN (Leq8U x y) -> (LessEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) (Leq16U x y) -> (LessEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) (Leq32U x y) -> (LessEqualU (CMP x y)) (Greater8 x y) -> (GreaterThan (CMP (SignExt8to32 x) (SignExt8to32 y))) (Greater16 x y) -> (GreaterThan (CMP (SignExt16to32 x) (SignExt16to32 y))) (Greater32 x y) -> (GreaterThan (CMP x y)) (Greater32F x y) -> (GreaterThan (CMPF x y)) (Greater64F x y) -> (GreaterThan (CMPD x y)) (Greater8U x y) -> (GreaterThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) (Greater16U x y) -> (GreaterThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) (Greater32U x y) -> (GreaterThanU (CMP x y)) (Geq8 x y) -> (GreaterEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) (Geq16 x y) -> (GreaterEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) (Geq32 x y) -> (GreaterEqual (CMP x y)) (Geq32F x y) -> (GreaterEqual (CMPF x y)) (Geq64F x y) -> (GreaterEqual (CMPD x y)) (Geq8U x y) -> (GreaterEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) (Geq16U x y) -> (GreaterEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) (Geq32U x y) -> (GreaterEqualU (CMP x y)) (OffPtr [off] ptr:(SP)) -> (MOVWaddr [off] ptr) (OffPtr [off] ptr) -> (ADDconst [off] ptr) (Addr {sym} base) -> (MOVWaddr {sym} base) // loads (Load <t> ptr mem) && t.IsBoolean() -> (MOVBUload ptr mem) (Load <t> ptr mem) && (is8BitInt(t) && isSigned(t)) -> (MOVBload ptr mem) (Load <t> ptr mem) && (is8BitInt(t) && !isSigned(t)) -> (MOVBUload ptr mem) (Load <t> ptr mem) && (is16BitInt(t) && isSigned(t)) -> (MOVHload ptr mem) (Load <t> ptr mem) && (is16BitInt(t) && !isSigned(t)) -> (MOVHUload ptr mem) (Load <t> ptr mem) && (is32BitInt(t) || isPtr(t)) -> (MOVWload ptr mem) (Load <t> ptr mem) && is32BitFloat(t) -> (MOVFload ptr mem) (Load <t> ptr mem) && is64BitFloat(t) -> (MOVDload ptr mem) // stores (Store {t} ptr val mem) && t.(*types.Type).Size() == 1 -> (MOVBstore ptr val mem) (Store {t} ptr val mem) && t.(*types.Type).Size() == 2 -> (MOVHstore ptr val mem) (Store {t} ptr val mem) && t.(*types.Type).Size() == 4 && !is32BitFloat(val.Type) -> (MOVWstore ptr val mem) (Store {t} ptr val mem) && t.(*types.Type).Size() == 4 && is32BitFloat(val.Type) -> (MOVFstore ptr val mem) (Store {t} ptr val mem) && t.(*types.Type).Size() == 8 && is64BitFloat(val.Type) -> (MOVDstore ptr val mem) // zero instructions (Zero [0] _ mem) -> mem (Zero [1] ptr mem) -> (MOVBstore ptr (MOVWconst [0]) mem) (Zero [2] {t} ptr mem) && t.(*types.Type).Alignment()%2 == 0 -> (MOVHstore ptr (MOVWconst [0]) mem) (Zero [2] ptr mem) -> (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)) (Zero [4] {t} ptr mem) && t.(*types.Type).Alignment()%4 == 0 -> (MOVWstore ptr (MOVWconst [0]) mem) (Zero [4] {t} ptr mem) && t.(*types.Type).Alignment()%2 == 0 -> (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem)) (Zero [4] ptr mem) -> (MOVBstore [3] ptr (MOVWconst [0]) (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)))) (Zero [3] ptr mem) -> (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))) // Medium zeroing uses a duff device // 4 and 128 are magic constants, see runtime/mkduff.go (Zero [s] {t} ptr mem) && s%4 == 0 && s > 4 && s <= 512 && t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice -> (DUFFZERO [4 * (128 - int64(s/4))] ptr (MOVWconst [0]) mem) // Large zeroing uses a loop (Zero [s] {t} ptr mem) && (s > 512 || config.noDuffDevice) || t.(*types.Type).Alignment()%4 != 0 -> (LoweredZero [t.(*types.Type).Alignment()] ptr (ADDconst <ptr.Type> ptr [s-moveSize(t.(*types.Type).Alignment(), config)]) (MOVWconst [0]) mem) // moves (Move [0] _ _ mem) -> mem (Move [1] dst src mem) -> (MOVBstore dst (MOVBUload src mem) mem) (Move [2] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 -> (MOVHstore dst (MOVHUload src mem) mem) (Move [2] dst src mem) -> (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)) (Move [4] {t} dst src mem) && t.(*types.Type).Alignment()%4 == 0 -> (MOVWstore dst (MOVWload src mem) mem) (Move [4] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 -> (MOVHstore [2] dst (MOVHUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem)) (Move [4] dst src mem) -> (MOVBstore [3] dst (MOVBUload [3] src mem) (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)))) (Move [3] dst src mem) -> (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))) // Medium move uses a duff device // 8 and 128 are magic constants, see runtime/mkduff.go (Move [s] {t} dst src mem) && s%4 == 0 && s > 4 && s <= 512 && t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice -> (DUFFCOPY [8 * (128 - int64(s/4))] dst src mem) // Large move uses a loop (Move [s] {t} dst src mem) && (s > 512 || config.noDuffDevice) || t.(*types.Type).Alignment()%4 != 0 -> (LoweredMove [t.(*types.Type).Alignment()] dst src (ADDconst <src.Type> src [s-moveSize(t.(*types.Type).Alignment(), config)]) mem) // calls (StaticCall [argwid] {target} mem) -> (CALLstatic [argwid] {target} mem) (ClosureCall [argwid] entry closure mem) -> (CALLclosure [argwid] entry closure mem) (InterCall [argwid] entry mem) -> (CALLinter [argwid] entry mem) // checks (NilCheck ptr mem) -> (LoweredNilCheck ptr mem) (IsNonNil ptr) -> (NotEqual (CMPconst [0] ptr)) (IsInBounds idx len) -> (LessThanU (CMP idx len)) (IsSliceInBounds idx len) -> (LessEqualU (CMP idx len)) // pseudo-ops (GetClosurePtr) -> (LoweredGetClosurePtr) (GetCallerSP) -> (LoweredGetCallerSP) (Convert x mem) -> (MOVWconvert x mem) // Absorb pseudo-ops into blocks. (If (Equal cc) yes no) -> (EQ cc yes no) (If (NotEqual cc) yes no) -> (NE cc yes no) (If (LessThan cc) yes no) -> (LT cc yes no) (If (LessThanU cc) yes no) -> (ULT cc yes no) (If (LessEqual cc) yes no) -> (LE cc yes no) (If (LessEqualU cc) yes no) -> (ULE cc yes no) (If (GreaterThan cc) yes no) -> (GT cc yes no) (If (GreaterThanU cc) yes no) -> (UGT cc yes no) (If (GreaterEqual cc) yes no) -> (GE cc yes no) (If (GreaterEqualU cc) yes no) -> (UGE cc yes no) (If cond yes no) -> (NE (CMPconst [0] cond) yes no) // Absorb boolean tests into block (NE (CMPconst [0] (Equal cc)) yes no) -> (EQ cc yes no) (NE (CMPconst [0] (NotEqual cc)) yes no) -> (NE cc yes no) (NE (CMPconst [0] (LessThan cc)) yes no) -> (LT cc yes no) (NE (CMPconst [0] (LessThanU cc)) yes no) -> (ULT cc yes no) (NE (CMPconst [0] (LessEqual cc)) yes no) -> (LE cc yes no) (NE (CMPconst [0] (LessEqualU cc)) yes no) -> (ULE cc yes no) (NE (CMPconst [0] (GreaterThan cc)) yes no) -> (GT cc yes no) (NE (CMPconst [0] (GreaterThanU cc)) yes no) -> (UGT cc yes no) (NE (CMPconst [0] (GreaterEqual cc)) yes no) -> (GE cc yes no) (NE (CMPconst [0] (GreaterEqualU cc)) yes no) -> (UGE cc yes no) // Optimizations // fold offset into address (ADDconst [off1] (MOVWaddr [off2] {sym} ptr)) -> (MOVWaddr [off1+off2] {sym} ptr) (SUBconst [off1] (MOVWaddr [off2] {sym} ptr)) -> (MOVWaddr [off2-off1] {sym} ptr) // fold address into load/store (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBload [off1+off2] {sym} ptr mem) (MOVBload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVBload [off1-off2] {sym} ptr mem) (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBUload [off1+off2] {sym} ptr mem) (MOVBUload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVBUload [off1-off2] {sym} ptr mem) (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHload [off1+off2] {sym} ptr mem) (MOVHload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVHload [off1-off2] {sym} ptr mem) (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHUload [off1+off2] {sym} ptr mem) (MOVHUload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVHUload [off1-off2] {sym} ptr mem) (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVWload [off1+off2] {sym} ptr mem) (MOVWload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVWload [off1-off2] {sym} ptr mem) (MOVFload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVFload [off1+off2] {sym} ptr mem) (MOVFload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVFload [off1-off2] {sym} ptr mem) (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVDload [off1+off2] {sym} ptr mem) (MOVDload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVDload [off1-off2] {sym} ptr mem) (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVBstore [off1+off2] {sym} ptr val mem) (MOVBstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVBstore [off1-off2] {sym} ptr val mem) (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVHstore [off1+off2] {sym} ptr val mem) (MOVHstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVHstore [off1-off2] {sym} ptr val mem) (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVWstore [off1+off2] {sym} ptr val mem) (MOVWstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVWstore [off1-off2] {sym} ptr val mem) (MOVFstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVFstore [off1+off2] {sym} ptr val mem) (MOVFstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVFstore [off1-off2] {sym} ptr val mem) (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVDstore [off1+off2] {sym} ptr val mem) (MOVDstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVDstore [off1-off2] {sym} ptr val mem) (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) // replace load from same location as preceding store with zero/sign extension (or copy in case of full width) (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVBreg x) (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVBUreg x) (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVHreg x) (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVHUreg x) (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x (MOVWloadidx ptr idx (MOVWstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> x (MOVWloadshiftLL ptr idx [c] (MOVWstoreshiftLL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x (MOVWloadshiftRL ptr idx [c] (MOVWstoreshiftRL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x (MOVWloadshiftRA ptr idx [c] (MOVWstoreshiftRA ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x (MOVBUloadidx ptr idx (MOVBstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVBUreg x) (MOVBloadidx ptr idx (MOVBstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVBreg x) (MOVHUloadidx ptr idx (MOVHstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVHUreg x) (MOVHloadidx ptr idx (MOVHstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVHreg x) // fold constant into arithmatic ops (ADD x (MOVWconst [c])) -> (ADDconst [c] x) (SUB (MOVWconst [c]) x) -> (RSBconst [c] x) (SUB x (MOVWconst [c])) -> (SUBconst [c] x) (RSB (MOVWconst [c]) x) -> (SUBconst [c] x) (RSB x (MOVWconst [c])) -> (RSBconst [c] x) (ADDS x (MOVWconst [c])) -> (ADDSconst [c] x) (SUBS x (MOVWconst [c])) -> (SUBSconst [c] x) (ADC (MOVWconst [c]) x flags) -> (ADCconst [c] x flags) (ADC x (MOVWconst [c]) flags) -> (ADCconst [c] x flags) (SBC (MOVWconst [c]) x flags) -> (RSCconst [c] x flags) (SBC x (MOVWconst [c]) flags) -> (SBCconst [c] x flags) (AND x (MOVWconst [c])) -> (ANDconst [c] x) (OR x (MOVWconst [c])) -> (ORconst [c] x) (XOR x (MOVWconst [c])) -> (XORconst [c] x) (BIC x (MOVWconst [c])) -> (BICconst [c] x) (SLL x (MOVWconst [c])) -> (SLLconst x [c&31]) // Note: I don't think we ever generate bad constant shifts (i.e. c>=32) (SRL x (MOVWconst [c])) -> (SRLconst x [c&31]) (SRA x (MOVWconst [c])) -> (SRAconst x [c&31]) (CMP x (MOVWconst [c])) -> (CMPconst [c] x) (CMP (MOVWconst [c]) x) -> (InvertFlags (CMPconst [c] x)) (CMN x (MOVWconst [c])) -> (CMNconst [c] x) (TST x (MOVWconst [c])) -> (TSTconst [c] x) (TEQ x (MOVWconst [c])) -> (TEQconst [c] x) // don't extend after proper load // MOVWreg instruction is not emitted if src and dst registers are same, but it ensures the type. (MOVBreg x:(MOVBload _ _)) -> (MOVWreg x) (MOVBUreg x:(MOVBUload _ _)) -> (MOVWreg x) (MOVHreg x:(MOVBload _ _)) -> (MOVWreg x) (MOVHreg x:(MOVBUload _ _)) -> (MOVWreg x) (MOVHreg x:(MOVHload _ _)) -> (MOVWreg x) (MOVHUreg x:(MOVBUload _ _)) -> (MOVWreg x) (MOVHUreg x:(MOVHUload _ _)) -> (MOVWreg x) // fold extensions and ANDs together (MOVBUreg (ANDconst [c] x)) -> (ANDconst [c&0xff] x) (MOVHUreg (ANDconst [c] x)) -> (ANDconst [c&0xffff] x) (MOVBreg (ANDconst [c] x)) && c & 0x80 == 0 -> (ANDconst [c&0x7f] x) (MOVHreg (ANDconst [c] x)) && c & 0x8000 == 0 -> (ANDconst [c&0x7fff] x) // fold double extensions (MOVBreg x:(MOVBreg _)) -> (MOVWreg x) (MOVBUreg x:(MOVBUreg _)) -> (MOVWreg x) (MOVHreg x:(MOVBreg _)) -> (MOVWreg x) (MOVHreg x:(MOVBUreg _)) -> (MOVWreg x) (MOVHreg x:(MOVHreg _)) -> (MOVWreg x) (MOVHUreg x:(MOVBUreg _)) -> (MOVWreg x) (MOVHUreg x:(MOVHUreg _)) -> (MOVWreg x) // don't extend before store (MOVBstore [off] {sym} ptr (MOVBreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) (MOVBstore [off] {sym} ptr (MOVBUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) (MOVBstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) (MOVBstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) (MOVHstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) (MOVHstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) // if a register move has only 1 use, just use the same register without emitting instruction // MOVWnop doesn't emit instruction, only for ensuring the type. (MOVWreg x) && x.Uses == 1 -> (MOVWnop x) // mul by constant (MUL x (MOVWconst [c])) && int32(c) == -1 -> (RSBconst [0] x) (MUL _ (MOVWconst [0])) -> (MOVWconst [0]) (MUL x (MOVWconst [1])) -> x (MUL x (MOVWconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) (MUL x (MOVWconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) (MUL x (MOVWconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSBshiftLL x x [log2(c+1)]) (MUL x (MOVWconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) (MUL x (MOVWconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) (MUL x (MOVWconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) (MUL x (MOVWconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) (MULA x (MOVWconst [c]) a) && int32(c) == -1 -> (SUB a x) (MULA _ (MOVWconst [0]) a) -> a (MULA x (MOVWconst [1]) a) -> (ADD x a) (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) (MULA x (MOVWconst [c]) a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) (MULA x (MOVWconst [c]) a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) (MULA x (MOVWconst [c]) a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) (MULA x (MOVWconst [c]) a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) (MULA (MOVWconst [c]) x a) && int32(c) == -1 -> (SUB a x) (MULA (MOVWconst [0]) _ a) -> a (MULA (MOVWconst [1]) x a) -> (ADD x a) (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) (MULA (MOVWconst [c]) x a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) (MULA (MOVWconst [c]) x a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) (MULA (MOVWconst [c]) x a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) (MULA (MOVWconst [c]) x a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) (MULS x (MOVWconst [c]) a) && int32(c) == -1 -> (ADD a x) (MULS _ (MOVWconst [0]) a) -> a (MULS x (MOVWconst [1]) a) -> (RSB x a) (MULS x (MOVWconst [c]) a) && isPowerOfTwo(c) -> (RSB (SLLconst <x.Type> [log2(c)] x) a) (MULS x (MOVWconst [c]) a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (RSB (ADDshiftLL <x.Type> x x [log2(c-1)]) a) (MULS x (MOVWconst [c]) a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSB (RSBshiftLL <x.Type> x x [log2(c+1)]) a) (MULS x (MOVWconst [c]) a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) (MULS x (MOVWconst [c]) a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) (MULS x (MOVWconst [c]) a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) (MULS x (MOVWconst [c]) a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) (MULS (MOVWconst [c]) x a) && int32(c) == -1 -> (ADD a x) (MULS (MOVWconst [0]) _ a) -> a (MULS (MOVWconst [1]) x a) -> (RSB x a) (MULS (MOVWconst [c]) x a) && isPowerOfTwo(c) -> (RSB (SLLconst <x.Type> [log2(c)] x) a) (MULS (MOVWconst [c]) x a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (RSB (ADDshiftLL <x.Type> x x [log2(c-1)]) a) (MULS (MOVWconst [c]) x a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSB (RSBshiftLL <x.Type> x x [log2(c+1)]) a) (MULS (MOVWconst [c]) x a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) (MULS (MOVWconst [c]) x a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) (MULS (MOVWconst [c]) x a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) (MULS (MOVWconst [c]) x a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) // div by constant (Select0 (CALLudiv x (MOVWconst [1]))) -> x (Select1 (CALLudiv _ (MOVWconst [1]))) -> (MOVWconst [0]) (Select0 (CALLudiv x (MOVWconst [c]))) && isPowerOfTwo(c) -> (SRLconst [log2(c)] x) (Select1 (CALLudiv x (MOVWconst [c]))) && isPowerOfTwo(c) -> (ANDconst [c-1] x) // constant comparisons (CMPconst (MOVWconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ) (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)<uint32(y) -> (FlagLT_ULT) (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)>uint32(y) -> (FlagLT_UGT) (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)<uint32(y) -> (FlagGT_ULT) (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)>uint32(y) -> (FlagGT_UGT) (CMNconst (MOVWconst [x]) [y]) && int32(x)==int32(-y) -> (FlagEQ) (CMNconst (MOVWconst [x]) [y]) && int32(x)<int32(-y) && uint32(x)<uint32(-y) -> (FlagLT_ULT) (CMNconst (MOVWconst [x]) [y]) && int32(x)<int32(-y) && uint32(x)>uint32(-y) -> (FlagLT_UGT) (CMNconst (MOVWconst [x]) [y]) && int32(x)>int32(-y) && uint32(x)<uint32(-y) -> (FlagGT_ULT) (CMNconst (MOVWconst [x]) [y]) && int32(x)>int32(-y) && uint32(x)>uint32(-y) -> (FlagGT_UGT) (TSTconst (MOVWconst [x]) [y]) && int32(x&y)==0 -> (FlagEQ) (TSTconst (MOVWconst [x]) [y]) && int32(x&y)<0 -> (FlagLT_UGT) (TSTconst (MOVWconst [x]) [y]) && int32(x&y)>0 -> (FlagGT_UGT) (TEQconst (MOVWconst [x]) [y]) && int32(x^y)==0 -> (FlagEQ) (TEQconst (MOVWconst [x]) [y]) && int32(x^y)<0 -> (FlagLT_UGT) (TEQconst (MOVWconst [x]) [y]) && int32(x^y)>0 -> (FlagGT_UGT) // other known comparisons (CMPconst (MOVBUreg _) [c]) && 0xff < c -> (FlagLT_ULT) (CMPconst (MOVHUreg _) [c]) && 0xffff < c -> (FlagLT_ULT) (CMPconst (ANDconst _ [m]) [n]) && 0 <= int32(m) && int32(m) < int32(n) -> (FlagLT_ULT) (CMPconst (SRLconst _ [c]) [n]) && 0 <= n && 0 < c && c <= 32 && (1<<uint32(32-c)) <= uint32(n) -> (FlagLT_ULT) // absorb flag constants into branches (EQ (FlagEQ) yes no) -> (First nil yes no) (EQ (FlagLT_ULT) yes no) -> (First nil no yes) (EQ (FlagLT_UGT) yes no) -> (First nil no yes) (EQ (FlagGT_ULT) yes no) -> (First nil no yes) (EQ (FlagGT_UGT) yes no) -> (First nil no yes) (NE (FlagEQ) yes no) -> (First nil no yes) (NE (FlagLT_ULT) yes no) -> (First nil yes no) (NE (FlagLT_UGT) yes no) -> (First nil yes no) (NE (FlagGT_ULT) yes no) -> (First nil yes no) (NE (FlagGT_UGT) yes no) -> (First nil yes no) (LT (FlagEQ) yes no) -> (First nil no yes) (LT (FlagLT_ULT) yes no) -> (First nil yes no) (LT (FlagLT_UGT) yes no) -> (First nil yes no) (LT (FlagGT_ULT) yes no) -> (First nil no yes) (LT (FlagGT_UGT) yes no) -> (First nil no yes) (LE (FlagEQ) yes no) -> (First nil yes no) (LE (FlagLT_ULT) yes no) -> (First nil yes no) (LE (FlagLT_UGT) yes no) -> (First nil yes no) (LE (FlagGT_ULT) yes no) -> (First nil no yes) (LE (FlagGT_UGT) yes no) -> (First nil no yes) (GT (FlagEQ) yes no) -> (First nil no yes) (GT (FlagLT_ULT) yes no) -> (First nil no yes) (GT (FlagLT_UGT) yes no) -> (First nil no yes) (GT (FlagGT_ULT) yes no) -> (First nil yes no) (GT (FlagGT_UGT) yes no) -> (First nil yes no) (GE (FlagEQ) yes no) -> (First nil yes no) (GE (FlagLT_ULT) yes no) -> (First nil no yes) (GE (FlagLT_UGT) yes no) -> (First nil no yes) (GE (FlagGT_ULT) yes no) -> (First nil yes no) (GE (FlagGT_UGT) yes no) -> (First nil yes no) (ULT (FlagEQ) yes no) -> (First nil no yes) (ULT (FlagLT_ULT) yes no) -> (First nil yes no) (ULT (FlagLT_UGT) yes no) -> (First nil no yes) (ULT (FlagGT_ULT) yes no) -> (First nil yes no) (ULT (FlagGT_UGT) yes no) -> (First nil no yes) (ULE (FlagEQ) yes no) -> (First nil yes no) (ULE (FlagLT_ULT) yes no) -> (First nil yes no) (ULE (FlagLT_UGT) yes no) -> (First nil no yes) (ULE (FlagGT_ULT) yes no) -> (First nil yes no) (ULE (FlagGT_UGT) yes no) -> (First nil no yes) (UGT (FlagEQ) yes no) -> (First nil no yes) (UGT (FlagLT_ULT) yes no) -> (First nil no yes) (UGT (FlagLT_UGT) yes no) -> (First nil yes no) (UGT (FlagGT_ULT) yes no) -> (First nil no yes) (UGT (FlagGT_UGT) yes no) -> (First nil yes no) (UGE (FlagEQ) yes no) -> (First nil yes no) (UGE (FlagLT_ULT) yes no) -> (First nil no yes) (UGE (FlagLT_UGT) yes no) -> (First nil yes no) (UGE (FlagGT_ULT) yes no) -> (First nil no yes) (UGE (FlagGT_UGT) yes no) -> (First nil yes no) // absorb InvertFlags into branches (LT (InvertFlags cmp) yes no) -> (GT cmp yes no) (GT (InvertFlags cmp) yes no) -> (LT cmp yes no) (LE (InvertFlags cmp) yes no) -> (GE cmp yes no) (GE (InvertFlags cmp) yes no) -> (LE cmp yes no) (ULT (InvertFlags cmp) yes no) -> (UGT cmp yes no) (UGT (InvertFlags cmp) yes no) -> (ULT cmp yes no) (ULE (InvertFlags cmp) yes no) -> (UGE cmp yes no) (UGE (InvertFlags cmp) yes no) -> (ULE cmp yes no) (EQ (InvertFlags cmp) yes no) -> (EQ cmp yes no) (NE (InvertFlags cmp) yes no) -> (NE cmp yes no) // absorb flag constants into boolean values (Equal (FlagEQ)) -> (MOVWconst [1]) (Equal (FlagLT_ULT)) -> (MOVWconst [0]) (Equal (FlagLT_UGT)) -> (MOVWconst [0]) (Equal (FlagGT_ULT)) -> (MOVWconst [0]) (Equal (FlagGT_UGT)) -> (MOVWconst [0]) (NotEqual (FlagEQ)) -> (MOVWconst [0]) (NotEqual (FlagLT_ULT)) -> (MOVWconst [1]) (NotEqual (FlagLT_UGT)) -> (MOVWconst [1]) (NotEqual (FlagGT_ULT)) -> (MOVWconst [1]) (NotEqual (FlagGT_UGT)) -> (MOVWconst [1]) (LessThan (FlagEQ)) -> (MOVWconst [0]) (LessThan (FlagLT_ULT)) -> (MOVWconst [1]) (LessThan (FlagLT_UGT)) -> (MOVWconst [1]) (LessThan (FlagGT_ULT)) -> (MOVWconst [0]) (LessThan (FlagGT_UGT)) -> (MOVWconst [0]) (LessThanU (FlagEQ)) -> (MOVWconst [0]) (LessThanU (FlagLT_ULT)) -> (MOVWconst [1]) (LessThanU (FlagLT_UGT)) -> (MOVWconst [0]) (LessThanU (FlagGT_ULT)) -> (MOVWconst [1]) (LessThanU (FlagGT_UGT)) -> (MOVWconst [0]) (LessEqual (FlagEQ)) -> (MOVWconst [1]) (LessEqual (FlagLT_ULT)) -> (MOVWconst [1]) (LessEqual (FlagLT_UGT)) -> (MOVWconst [1]) (LessEqual (FlagGT_ULT)) -> (MOVWconst [0]) (LessEqual (FlagGT_UGT)) -> (MOVWconst [0]) (LessEqualU (FlagEQ)) -> (MOVWconst [1]) (LessEqualU (FlagLT_ULT)) -> (MOVWconst [1]) (LessEqualU (FlagLT_UGT)) -> (MOVWconst [0]) (LessEqualU (FlagGT_ULT)) -> (MOVWconst [1]) (LessEqualU (FlagGT_UGT)) -> (MOVWconst [0]) (GreaterThan (FlagEQ)) -> (MOVWconst [0]) (GreaterThan (FlagLT_ULT)) -> (MOVWconst [0]) (GreaterThan (FlagLT_UGT)) -> (MOVWconst [0]) (GreaterThan (FlagGT_ULT)) -> (MOVWconst [1]) (GreaterThan (FlagGT_UGT)) -> (MOVWconst [1]) (GreaterThanU (FlagEQ)) -> (MOVWconst [0]) (GreaterThanU (FlagLT_ULT)) -> (MOVWconst [0]) (GreaterThanU (FlagLT_UGT)) -> (MOVWconst [1]) (GreaterThanU (FlagGT_ULT)) -> (MOVWconst [0]) (GreaterThanU (FlagGT_UGT)) -> (MOVWconst [1]) (GreaterEqual (FlagEQ)) -> (MOVWconst [1]) (GreaterEqual (FlagLT_ULT)) -> (MOVWconst [0]) (GreaterEqual (FlagLT_UGT)) -> (MOVWconst [0]) (GreaterEqual (FlagGT_ULT)) -> (MOVWconst [1]) (GreaterEqual (FlagGT_UGT)) -> (MOVWconst [1]) (GreaterEqualU (FlagEQ)) -> (MOVWconst [1]) (GreaterEqualU (FlagLT_ULT)) -> (MOVWconst [0]) (GreaterEqualU (FlagLT_UGT)) -> (MOVWconst [1]) (GreaterEqualU (FlagGT_ULT)) -> (MOVWconst [0]) (GreaterEqualU (FlagGT_UGT)) -> (MOVWconst [1]) // absorb InvertFlags into boolean values (Equal (InvertFlags x)) -> (Equal x) (NotEqual (InvertFlags x)) -> (NotEqual x) (LessThan (InvertFlags x)) -> (GreaterThan x) (LessThanU (InvertFlags x)) -> (GreaterThanU x) (GreaterThan (InvertFlags x)) -> (LessThan x) (GreaterThanU (InvertFlags x)) -> (LessThanU x) (LessEqual (InvertFlags x)) -> (GreaterEqual x) (LessEqualU (InvertFlags x)) -> (GreaterEqualU x) (GreaterEqual (InvertFlags x)) -> (LessEqual x) (GreaterEqualU (InvertFlags x)) -> (LessEqualU x) // absorb flag constants into conditional instructions (CMOVWLSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) (CMOVWLSconst _ (FlagLT_ULT) [c]) -> (MOVWconst [c]) (CMOVWLSconst x (FlagLT_UGT)) -> x (CMOVWLSconst _ (FlagGT_ULT) [c]) -> (MOVWconst [c]) (CMOVWLSconst x (FlagGT_UGT)) -> x (CMOVWHSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) (CMOVWHSconst x (FlagLT_ULT)) -> x (CMOVWHSconst _ (FlagLT_UGT) [c]) -> (MOVWconst [c]) (CMOVWHSconst x (FlagGT_ULT)) -> x (CMOVWHSconst _ (FlagGT_UGT) [c]) -> (MOVWconst [c]) (CMOVWLSconst x (InvertFlags flags) [c]) -> (CMOVWHSconst x flags [c]) (CMOVWHSconst x (InvertFlags flags) [c]) -> (CMOVWLSconst x flags [c]) (SRAcond x _ (FlagEQ)) -> (SRAconst x [31]) (SRAcond x y (FlagLT_ULT)) -> (SRA x y) (SRAcond x _ (FlagLT_UGT)) -> (SRAconst x [31]) (SRAcond x y (FlagGT_ULT)) -> (SRA x y) (SRAcond x _ (FlagGT_UGT)) -> (SRAconst x [31]) // remove redundant *const ops (ADDconst [0] x) -> x (SUBconst [0] x) -> x (ANDconst [0] _) -> (MOVWconst [0]) (ANDconst [c] x) && int32(c)==-1 -> x (ORconst [0] x) -> x (ORconst [c] _) && int32(c)==-1 -> (MOVWconst [-1]) (XORconst [0] x) -> x (BICconst [0] x) -> x (BICconst [c] _) && int32(c)==-1 -> (MOVWconst [0]) // generic constant folding (ADDconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c)) -> (SUBconst [int64(int32(-c))] x) (SUBconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c)) -> (ADDconst [int64(int32(-c))] x) (ANDconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c)) -> (BICconst [int64(int32(^uint32(c)))] x) (BICconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c)) -> (ANDconst [int64(int32(^uint32(c)))] x) (ADDconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c+d))]) (ADDconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(c+d))] x) (ADDconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) (ADDconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) (ADCconst [c] (ADDconst [d] x) flags) -> (ADCconst [int64(int32(c+d))] x flags) (ADCconst [c] (SUBconst [d] x) flags) -> (ADCconst [int64(int32(c-d))] x flags) (SUBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d-c))]) (SUBconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(-c-d))] x) (SUBconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(-c+d))] x) (SUBconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(-c+d))] x) (SBCconst [c] (ADDconst [d] x) flags) -> (SBCconst [int64(int32(c-d))] x flags) (SBCconst [c] (SUBconst [d] x) flags) -> (SBCconst [int64(int32(c+d))] x flags) (RSBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c-d))]) (RSBconst [c] (RSBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) (RSBconst [c] (ADDconst [d] x)) -> (RSBconst [int64(int32(c-d))] x) (RSBconst [c] (SUBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) (RSCconst [c] (ADDconst [d] x) flags) -> (RSCconst [int64(int32(c-d))] x flags) (RSCconst [c] (SUBconst [d] x) flags) -> (RSCconst [int64(int32(c+d))] x flags) (SLLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)<<uint64(c))]) (SRLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)>>uint64(c))]) (SRAconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d)>>uint64(c))]) (MUL (MOVWconst [c]) (MOVWconst [d])) -> (MOVWconst [int64(int32(c*d))]) (MULA (MOVWconst [c]) (MOVWconst [d]) a) -> (ADDconst [int64(int32(c*d))] a) (MULS (MOVWconst [c]) (MOVWconst [d]) a) -> (SUBconst [int64(int32(c*d))] a) (Select0 (CALLudiv (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)/uint32(d))]) (Select1 (CALLudiv (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)%uint32(d))]) (ANDconst [c] (MOVWconst [d])) -> (MOVWconst [c&d]) (ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x) (ORconst [c] (MOVWconst [d])) -> (MOVWconst [c|d]) (ORconst [c] (ORconst [d] x)) -> (ORconst [c|d] x) (XORconst [c] (MOVWconst [d])) -> (MOVWconst [c^d]) (XORconst [c] (XORconst [d] x)) -> (XORconst [c^d] x) (BICconst [c] (MOVWconst [d])) -> (MOVWconst [d&^c]) (BICconst [c] (BICconst [d] x)) -> (BICconst [int64(int32(c|d))] x) (MVN (MOVWconst [c])) -> (MOVWconst [^c]) (MOVBreg (MOVWconst [c])) -> (MOVWconst [int64(int8(c))]) (MOVBUreg (MOVWconst [c])) -> (MOVWconst [int64(uint8(c))]) (MOVHreg (MOVWconst [c])) -> (MOVWconst [int64(int16(c))]) (MOVHUreg (MOVWconst [c])) -> (MOVWconst [int64(uint16(c))]) (MOVWreg (MOVWconst [c])) -> (MOVWconst [c]) // BFX: Width = c >> 8, LSB = c & 0xff, result = d << (32 - Width - LSB) >> (32 - Width) (BFX [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d)<<(32-uint32(c&0xff)-uint32(c>>8))>>(32-uint32(c>>8)))]) (BFXU [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)<<(32-uint32(c&0xff)-uint32(c>>8))>>(32-uint32(c>>8)))]) // absorb shifts into ops (ADD x (SLLconst [c] y)) -> (ADDshiftLL x y [c]) (ADD x (SRLconst [c] y)) -> (ADDshiftRL x y [c]) (ADD x (SRAconst [c] y)) -> (ADDshiftRA x y [c]) (ADD x (SLL y z)) -> (ADDshiftLLreg x y z) (ADD x (SRL y z)) -> (ADDshiftRLreg x y z) (ADD x (SRA y z)) -> (ADDshiftRAreg x y z) (ADC x (SLLconst [c] y) flags) -> (ADCshiftLL x y [c] flags) (ADC (SLLconst [c] y) x flags) -> (ADCshiftLL x y [c] flags) (ADC x (SRLconst [c] y) flags) -> (ADCshiftRL x y [c] flags) (ADC (SRLconst [c] y) x flags) -> (ADCshiftRL x y [c] flags) (ADC x (SRAconst [c] y) flags) -> (ADCshiftRA x y [c] flags) (ADC (SRAconst [c] y) x flags) -> (ADCshiftRA x y [c] flags) (ADC x (SLL y z) flags) -> (ADCshiftLLreg x y z flags) (ADC (SLL y z) x flags) -> (ADCshiftLLreg x y z flags) (ADC x (SRL y z) flags) -> (ADCshiftRLreg x y z flags) (ADC (SRL y z) x flags) -> (ADCshiftRLreg x y z flags) (ADC x (SRA y z) flags) -> (ADCshiftRAreg x y z flags) (ADC (SRA y z) x flags) -> (ADCshiftRAreg x y z flags) (ADDS x (SLLconst [c] y)) -> (ADDSshiftLL x y [c]) (ADDS x (SRLconst [c] y)) -> (ADDSshiftRL x y [c]) (ADDS x (SRAconst [c] y)) -> (ADDSshiftRA x y [c]) (ADDS x (SLL y z)) -> (ADDSshiftLLreg x y z) (ADDS x (SRL y z)) -> (ADDSshiftRLreg x y z) (ADDS x (SRA y z)) -> (ADDSshiftRAreg x y z) (SUB x (SLLconst [c] y)) -> (SUBshiftLL x y [c]) (SUB (SLLconst [c] y) x) -> (RSBshiftLL x y [c]) (SUB x (SRLconst [c] y)) -> (SUBshiftRL x y [c]) (SUB (SRLconst [c] y) x) -> (RSBshiftRL x y [c]) (SUB x (SRAconst [c] y)) -> (SUBshiftRA x y [c]) (SUB (SRAconst [c] y) x) -> (RSBshiftRA x y [c]) (SUB x (SLL y z)) -> (SUBshiftLLreg x y z) (SUB (SLL y z) x) -> (RSBshiftLLreg x y z) (SUB x (SRL y z)) -> (SUBshiftRLreg x y z) (SUB (SRL y z) x) -> (RSBshiftRLreg x y z) (SUB x (SRA y z)) -> (SUBshiftRAreg x y z) (SUB (SRA y z) x) -> (RSBshiftRAreg x y z) (SBC x (SLLconst [c] y) flags) -> (SBCshiftLL x y [c] flags) (SBC (SLLconst [c] y) x flags) -> (RSCshiftLL x y [c] flags) (SBC x (SRLconst [c] y) flags) -> (SBCshiftRL x y [c] flags) (SBC (SRLconst [c] y) x flags) -> (RSCshiftRL x y [c] flags) (SBC x (SRAconst [c] y) flags) -> (SBCshiftRA x y [c] flags) (SBC (SRAconst [c] y) x flags) -> (RSCshiftRA x y [c] flags) (SBC x (SLL y z) flags) -> (SBCshiftLLreg x y z flags) (SBC (SLL y z) x flags) -> (RSCshiftLLreg x y z flags) (SBC x (SRL y z) flags) -> (SBCshiftRLreg x y z flags) (SBC (SRL y z) x flags) -> (RSCshiftRLreg x y z flags) (SBC x (SRA y z) flags) -> (SBCshiftRAreg x y z flags) (SBC (SRA y z) x flags) -> (RSCshiftRAreg x y z flags) (SUBS x (SLLconst [c] y)) -> (SUBSshiftLL x y [c]) (SUBS (SLLconst [c] y) x) -> (RSBSshiftLL x y [c]) (SUBS x (SRLconst [c] y)) -> (SUBSshiftRL x y [c]) (SUBS (SRLconst [c] y) x) -> (RSBSshiftRL x y [c]) (SUBS x (SRAconst [c] y)) -> (SUBSshiftRA x y [c]) (SUBS (SRAconst [c] y) x) -> (RSBSshiftRA x y [c]) (SUBS x (SLL y z)) -> (SUBSshiftLLreg x y z) (SUBS (SLL y z) x) -> (RSBSshiftLLreg x y z) (SUBS x (SRL y z)) -> (SUBSshiftRLreg x y z) (SUBS (SRL y z) x) -> (RSBSshiftRLreg x y z) (SUBS x (SRA y z)) -> (SUBSshiftRAreg x y z) (SUBS (SRA y z) x) -> (RSBSshiftRAreg x y z) (RSB x (SLLconst [c] y)) -> (RSBshiftLL x y [c]) (RSB (SLLconst [c] y) x) -> (SUBshiftLL x y [c]) (RSB x (SRLconst [c] y)) -> (RSBshiftRL x y [c]) (RSB (SRLconst [c] y) x) -> (SUBshiftRL x y [c]) (RSB x (SRAconst [c] y)) -> (RSBshiftRA x y [c]) (RSB (SRAconst [c] y) x) -> (SUBshiftRA x y [c]) (RSB x (SLL y z)) -> (RSBshiftLLreg x y z) (RSB (SLL y z) x) -> (SUBshiftLLreg x y z) (RSB x (SRL y z)) -> (RSBshiftRLreg x y z) (RSB (SRL y z) x) -> (SUBshiftRLreg x y z) (RSB x (SRA y z)) -> (RSBshiftRAreg x y z) (RSB (SRA y z) x) -> (SUBshiftRAreg x y z) (AND x (SLLconst [c] y)) -> (ANDshiftLL x y [c]) (AND x (SRLconst [c] y)) -> (ANDshiftRL x y [c]) (AND x (SRAconst [c] y)) -> (ANDshiftRA x y [c]) (AND x (SLL y z)) -> (ANDshiftLLreg x y z) (AND x (SRL y z)) -> (ANDshiftRLreg x y z) (AND x (SRA y z)) -> (ANDshiftRAreg x y z) (OR x (SLLconst [c] y)) -> (ORshiftLL x y [c]) (OR x (SRLconst [c] y)) -> (ORshiftRL x y [c]) (OR x (SRAconst [c] y)) -> (ORshiftRA x y [c]) (OR x (SLL y z)) -> (ORshiftLLreg x y z) (OR x (SRL y z)) -> (ORshiftRLreg x y z) (OR x (SRA y z)) -> (ORshiftRAreg x y z) (XOR x (SLLconst [c] y)) -> (XORshiftLL x y [c]) (XOR x (SRLconst [c] y)) -> (XORshiftRL x y [c]) (XOR x (SRAconst [c] y)) -> (XORshiftRA x y [c]) (XOR x (SRRconst [c] y)) -> (XORshiftRR x y [c]) (XOR x (SLL y z)) -> (XORshiftLLreg x y z) (XOR x (SRL y z)) -> (XORshiftRLreg x y z) (XOR x (SRA y z)) -> (XORshiftRAreg x y z) (BIC x (SLLconst [c] y)) -> (BICshiftLL x y [c]) (BIC x (SRLconst [c] y)) -> (BICshiftRL x y [c]) (BIC x (SRAconst [c] y)) -> (BICshiftRA x y [c]) (BIC x (SLL y z)) -> (BICshiftLLreg x y z) (BIC x (SRL y z)) -> (BICshiftRLreg x y z) (BIC x (SRA y z)) -> (BICshiftRAreg x y z) (MVN (SLLconst [c] x)) -> (MVNshiftLL x [c]) (MVN (SRLconst [c] x)) -> (MVNshiftRL x [c]) (MVN (SRAconst [c] x)) -> (MVNshiftRA x [c]) (MVN (SLL x y)) -> (MVNshiftLLreg x y) (MVN (SRL x y)) -> (MVNshiftRLreg x y) (MVN (SRA x y)) -> (MVNshiftRAreg x y) (CMP x (SLLconst [c] y)) -> (CMPshiftLL x y [c]) (CMP (SLLconst [c] y) x) -> (InvertFlags (CMPshiftLL x y [c])) (CMP x (SRLconst [c] y)) -> (CMPshiftRL x y [c]) (CMP (SRLconst [c] y) x) -> (InvertFlags (CMPshiftRL x y [c])) (CMP x (SRAconst [c] y)) -> (CMPshiftRA x y [c]) (CMP (SRAconst [c] y) x) -> (InvertFlags (CMPshiftRA x y [c])) (CMP x (SLL y z)) -> (CMPshiftLLreg x y z) (CMP (SLL y z) x) -> (InvertFlags (CMPshiftLLreg x y z)) (CMP x (SRL y z)) -> (CMPshiftRLreg x y z) (CMP (SRL y z) x) -> (InvertFlags (CMPshiftRLreg x y z)) (CMP x (SRA y z)) -> (CMPshiftRAreg x y z) (CMP (SRA y z) x) -> (InvertFlags (CMPshiftRAreg x y z)) (TST x (SLLconst [c] y)) -> (TSTshiftLL x y [c]) (TST x (SRLconst [c] y)) -> (TSTshiftRL x y [c]) (TST x (SRAconst [c] y)) -> (TSTshiftRA x y [c]) (TST x (SLL y z)) -> (TSTshiftLLreg x y z) (TST x (SRL y z)) -> (TSTshiftRLreg x y z) (TST x (SRA y z)) -> (TSTshiftRAreg x y z) (TEQ x (SLLconst [c] y)) -> (TEQshiftLL x y [c]) (TEQ x (SRLconst [c] y)) -> (TEQshiftRL x y [c]) (TEQ x (SRAconst [c] y)) -> (TEQshiftRA x y [c]) (TEQ x (SLL y z)) -> (TEQshiftLLreg x y z) (TEQ x (SRL y z)) -> (TEQshiftRLreg x y z) (TEQ x (SRA y z)) -> (TEQshiftRAreg x y z) (CMN x (SLLconst [c] y)) -> (CMNshiftLL x y [c]) (CMN x (SRLconst [c] y)) -> (CMNshiftRL x y [c]) (CMN x (SRAconst [c] y)) -> (CMNshiftRA x y [c]) (CMN x (SLL y z)) -> (CMNshiftLLreg x y z) (CMN x (SRL y z)) -> (CMNshiftRLreg x y z) (CMN x (SRA y z)) -> (CMNshiftRAreg x y z) // prefer *const ops to *shift ops (ADDshiftLL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SLLconst <x.Type> x [d])) (ADDshiftRL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRLconst <x.Type> x [d])) (ADDshiftRA (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRAconst <x.Type> x [d])) (ADCshiftLL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SLLconst <x.Type> x [d]) flags) (ADCshiftRL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRLconst <x.Type> x [d]) flags) (ADCshiftRA (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRAconst <x.Type> x [d]) flags) (ADDSshiftLL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SLLconst <x.Type> x [d])) (ADDSshiftRL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRLconst <x.Type> x [d])) (ADDSshiftRA (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRAconst <x.Type> x [d])) (SUBshiftLL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SLLconst <x.Type> x [d])) (SUBshiftRL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRLconst <x.Type> x [d])) (SUBshiftRA (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRAconst <x.Type> x [d])) (SBCshiftLL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SLLconst <x.Type> x [d]) flags) (SBCshiftRL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRLconst <x.Type> x [d]) flags) (SBCshiftRA (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRAconst <x.Type> x [d]) flags) (SUBSshiftLL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SLLconst <x.Type> x [d])) (SUBSshiftRL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRLconst <x.Type> x [d])) (SUBSshiftRA (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRAconst <x.Type> x [d])) (RSBshiftLL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SLLconst <x.Type> x [d])) (RSBshiftRL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRLconst <x.Type> x [d])) (RSBshiftRA (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRAconst <x.Type> x [d])) (RSCshiftLL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SLLconst <x.Type> x [d]) flags) (RSCshiftRL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRLconst <x.Type> x [d]) flags) (RSCshiftRA (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRAconst <x.Type> x [d]) flags) (RSBSshiftLL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SLLconst <x.Type> x [d])) (RSBSshiftRL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRLconst <x.Type> x [d])) (RSBSshiftRA (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRAconst <x.Type> x [d])) (ANDshiftLL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SLLconst <x.Type> x [d])) (ANDshiftRL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRLconst <x.Type> x [d])) (ANDshiftRA (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRAconst <x.Type> x [d])) (ORshiftLL (MOVWconst [c]) x [d]) -> (ORconst [c] (SLLconst <x.Type> x [d])) (ORshiftRL (MOVWconst [c]) x [d]) -> (ORconst [c] (SRLconst <x.Type> x [d])) (ORshiftRA (MOVWconst [c]) x [d]) -> (ORconst [c] (SRAconst <x.Type> x [d])) (XORshiftLL (MOVWconst [c]) x [d]) -> (XORconst [c] (SLLconst <x.Type> x [d])) (XORshiftRL (MOVWconst [c]) x [d]) -> (XORconst [c] (SRLconst <x.Type> x [d])) (XORshiftRA (MOVWconst [c]) x [d]) -> (XORconst [c] (SRAconst <x.Type> x [d])) (XORshiftRR (MOVWconst [c]) x [d]) -> (XORconst [c] (SRRconst <x.Type> x [d])) (CMPshiftLL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d]))) (CMPshiftRL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d]))) (CMPshiftRA (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d]))) (TSTshiftLL (MOVWconst [c]) x [d]) -> (TSTconst [c] (SLLconst <x.Type> x [d])) (TSTshiftRL (MOVWconst [c]) x [d]) -> (TSTconst [c] (SRLconst <x.Type> x [d])) (TSTshiftRA (MOVWconst [c]) x [d]) -> (TSTconst [c] (SRAconst <x.Type> x [d])) (TEQshiftLL (MOVWconst [c]) x [d]) -> (TEQconst [c] (SLLconst <x.Type> x [d])) (TEQshiftRL (MOVWconst [c]) x [d]) -> (TEQconst [c] (SRLconst <x.Type> x [d])) (TEQshiftRA (MOVWconst [c]) x [d]) -> (TEQconst [c] (SRAconst <x.Type> x [d])) (CMNshiftLL (MOVWconst [c]) x [d]) -> (CMNconst [c] (SLLconst <x.Type> x [d])) (CMNshiftRL (MOVWconst [c]) x [d]) -> (CMNconst [c] (SRLconst <x.Type> x [d])) (CMNshiftRA (MOVWconst [c]) x [d]) -> (CMNconst [c] (SRAconst <x.Type> x [d])) (ADDshiftLLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SLL <x.Type> x y)) (ADDshiftRLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRL <x.Type> x y)) (ADDshiftRAreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRA <x.Type> x y)) (ADCshiftLLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SLL <x.Type> x y) flags) (ADCshiftRLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRL <x.Type> x y) flags) (ADCshiftRAreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRA <x.Type> x y) flags) (ADDSshiftLLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SLL <x.Type> x y)) (ADDSshiftRLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRL <x.Type> x y)) (ADDSshiftRAreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRA <x.Type> x y)) (SUBshiftLLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SLL <x.Type> x y)) (SUBshiftRLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRL <x.Type> x y)) (SUBshiftRAreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRA <x.Type> x y)) (SBCshiftLLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SLL <x.Type> x y) flags) (SBCshiftRLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRL <x.Type> x y) flags) (SBCshiftRAreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRA <x.Type> x y) flags) (SUBSshiftLLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SLL <x.Type> x y)) (SUBSshiftRLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRL <x.Type> x y)) (SUBSshiftRAreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRA <x.Type> x y)) (RSBshiftLLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SLL <x.Type> x y)) (RSBshiftRLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRL <x.Type> x y)) (RSBshiftRAreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRA <x.Type> x y)) (RSCshiftLLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SLL <x.Type> x y) flags) (RSCshiftRLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRL <x.Type> x y) flags) (RSCshiftRAreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRA <x.Type> x y) flags) (RSBSshiftLLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SLL <x.Type> x y)) (RSBSshiftRLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRL <x.Type> x y)) (RSBSshiftRAreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRA <x.Type> x y)) (ANDshiftLLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SLL <x.Type> x y)) (ANDshiftRLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRL <x.Type> x y)) (ANDshiftRAreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRA <x.Type> x y)) (ORshiftLLreg (MOVWconst [c]) x y) -> (ORconst [c] (SLL <x.Type> x y)) (ORshiftRLreg (MOVWconst [c]) x y) -> (ORconst [c] (SRL <x.Type> x y)) (ORshiftRAreg (MOVWconst [c]) x y) -> (ORconst [c] (SRA <x.Type> x y)) (XORshiftLLreg (MOVWconst [c]) x y) -> (XORconst [c] (SLL <x.Type> x y)) (XORshiftRLreg (MOVWconst [c]) x y) -> (XORconst [c] (SRL <x.Type> x y)) (XORshiftRAreg (MOVWconst [c]) x y) -> (XORconst [c] (SRA <x.Type> x y)) (CMPshiftLLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SLL <x.Type> x y))) (CMPshiftRLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRL <x.Type> x y))) (CMPshiftRAreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRA <x.Type> x y))) (TSTshiftLLreg (MOVWconst [c]) x y) -> (TSTconst [c] (SLL <x.Type> x y)) (TSTshiftRLreg (MOVWconst [c]) x y) -> (TSTconst [c] (SRL <x.Type> x y)) (TSTshiftRAreg (MOVWconst [c]) x y) -> (TSTconst [c] (SRA <x.Type> x y)) (TEQshiftLLreg (MOVWconst [c]) x y) -> (TEQconst [c] (SLL <x.Type> x y)) (TEQshiftRLreg (MOVWconst [c]) x y) -> (TEQconst [c] (SRL <x.Type> x y)) (TEQshiftRAreg (MOVWconst [c]) x y) -> (TEQconst [c] (SRA <x.Type> x y)) (CMNshiftLLreg (MOVWconst [c]) x y) -> (CMNconst [c] (SLL <x.Type> x y)) (CMNshiftRLreg (MOVWconst [c]) x y) -> (CMNconst [c] (SRL <x.Type> x y)) (CMNshiftRAreg (MOVWconst [c]) x y) -> (CMNconst [c] (SRA <x.Type> x y)) // constant folding in *shift ops (ADDshiftLL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(int32(uint32(c)<<uint64(d)))]) (ADDshiftRL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(int32(uint32(c)>>uint64(d)))]) (ADDshiftRA x (MOVWconst [c]) [d]) -> (ADDconst x [int64(int32(c)>>uint64(d))]) (ADCshiftLL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(int32(uint32(c)<<uint64(d)))] flags) (ADCshiftRL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(int32(uint32(c)>>uint64(d)))] flags) (ADCshiftRA x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(int32(c)>>uint64(d))] flags) (ADDSshiftLL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(int32(uint32(c)<<uint64(d)))]) (ADDSshiftRL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(int32(uint32(c)>>uint64(d)))]) (ADDSshiftRA x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(int32(c)>>uint64(d))]) (SUBshiftLL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(int32(uint32(c)<<uint64(d)))]) (SUBshiftRL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(int32(uint32(c)>>uint64(d)))]) (SUBshiftRA x (MOVWconst [c]) [d]) -> (SUBconst x [int64(int32(c)>>uint64(d))]) (SBCshiftLL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(int32(uint32(c)<<uint64(d)))] flags) (SBCshiftRL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(int32(uint32(c)>>uint64(d)))] flags) (SBCshiftRA x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(int32(c)>>uint64(d))] flags) (SUBSshiftLL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(int32(uint32(c)<<uint64(d)))]) (SUBSshiftRL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(int32(uint32(c)>>uint64(d)))]) (SUBSshiftRA x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(int32(c)>>uint64(d))]) (RSBshiftLL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(int32(uint32(c)<<uint64(d)))]) (RSBshiftRL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(int32(uint32(c)>>uint64(d)))]) (RSBshiftRA x (MOVWconst [c]) [d]) -> (RSBconst x [int64(int32(c)>>uint64(d))]) (RSCshiftLL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(int32(uint32(c)<<uint64(d)))] flags) (RSCshiftRL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(int32(uint32(c)>>uint64(d)))] flags) (RSCshiftRA x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(int32(c)>>uint64(d))] flags) (RSBSshiftLL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(int32(uint32(c)<<uint64(d)))]) (RSBSshiftRL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(int32(uint32(c)>>uint64(d)))]) (RSBSshiftRA x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(int32(c)>>uint64(d))]) (ANDshiftLL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(int32(uint32(c)<<uint64(d)))]) (ANDshiftRL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(int32(uint32(c)>>uint64(d)))]) (ANDshiftRA x (MOVWconst [c]) [d]) -> (ANDconst x [int64(int32(c)>>uint64(d))]) (ORshiftLL x (MOVWconst [c]) [d]) -> (ORconst x [int64(int32(uint32(c)<<uint64(d)))]) (ORshiftRL x (MOVWconst [c]) [d]) -> (ORconst x [int64(int32(uint32(c)>>uint64(d)))]) (ORshiftRA x (MOVWconst [c]) [d]) -> (ORconst x [int64(int32(c)>>uint64(d))]) (XORshiftLL x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(uint32(c)<<uint64(d)))]) (XORshiftRL x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(uint32(c)>>uint64(d)))]) (XORshiftRA x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(c)>>uint64(d))]) (XORshiftRR x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(uint32(c)>>uint64(d)|uint32(c)<<uint64(32-d)))]) (BICshiftLL x (MOVWconst [c]) [d]) -> (BICconst x [int64(int32(uint32(c)<<uint64(d)))]) (BICshiftRL x (MOVWconst [c]) [d]) -> (BICconst x [int64(int32(uint32(c)>>uint64(d)))]) (BICshiftRA x (MOVWconst [c]) [d]) -> (BICconst x [int64(int32(c)>>uint64(d))]) (MVNshiftLL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)<<uint64(d))]) (MVNshiftRL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)>>uint64(d))]) (MVNshiftRA (MOVWconst [c]) [d]) -> (MOVWconst [^int64(int32(c)>>uint64(d))]) (CMPshiftLL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(int32(uint32(c)<<uint64(d)))]) (CMPshiftRL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(int32(uint32(c)>>uint64(d)))]) (CMPshiftRA x (MOVWconst [c]) [d]) -> (CMPconst x [int64(int32(c)>>uint64(d))]) (TSTshiftLL x (MOVWconst [c]) [d]) -> (TSTconst x [int64(int32(uint32(c)<<uint64(d)))]) (TSTshiftRL x (MOVWconst [c]) [d]) -> (TSTconst x [int64(int32(uint32(c)>>uint64(d)))]) (TSTshiftRA x (MOVWconst [c]) [d]) -> (TSTconst x [int64(int32(c)>>uint64(d))]) (TEQshiftLL x (MOVWconst [c]) [d]) -> (TEQconst x [int64(int32(uint32(c)<<uint64(d)))]) (TEQshiftRL x (MOVWconst [c]) [d]) -> (TEQconst x [int64(int32(uint32(c)>>uint64(d)))]) (TEQshiftRA x (MOVWconst [c]) [d]) -> (TEQconst x [int64(int32(c)>>uint64(d))]) (CMNshiftLL x (MOVWconst [c]) [d]) -> (CMNconst x [int64(int32(uint32(c)<<uint64(d)))]) (CMNshiftRL x (MOVWconst [c]) [d]) -> (CMNconst x [int64(int32(uint32(c)>>uint64(d)))]) (CMNshiftRA x (MOVWconst [c]) [d]) -> (CMNconst x [int64(int32(c)>>uint64(d))]) (ADDshiftLLreg x y (MOVWconst [c])) -> (ADDshiftLL x y [c]) (ADDshiftRLreg x y (MOVWconst [c])) -> (ADDshiftRL x y [c]) (ADDshiftRAreg x y (MOVWconst [c])) -> (ADDshiftRA x y [c]) (ADCshiftLLreg x y (MOVWconst [c]) flags) -> (ADCshiftLL x y [c] flags) (ADCshiftRLreg x y (MOVWconst [c]) flags) -> (ADCshiftRL x y [c] flags) (ADCshiftRAreg x y (MOVWconst [c]) flags) -> (ADCshiftRA x y [c] flags) (ADDSshiftLLreg x y (MOVWconst [c])) -> (ADDSshiftLL x y [c]) (ADDSshiftRLreg x y (MOVWconst [c])) -> (ADDSshiftRL x y [c]) (ADDSshiftRAreg x y (MOVWconst [c])) -> (ADDSshiftRA x y [c]) (SUBshiftLLreg x y (MOVWconst [c])) -> (SUBshiftLL x y [c]) (SUBshiftRLreg x y (MOVWconst [c])) -> (SUBshiftRL x y [c]) (SUBshiftRAreg x y (MOVWconst [c])) -> (SUBshiftRA x y [c]) (SBCshiftLLreg x y (MOVWconst [c]) flags) -> (SBCshiftLL x y [c] flags) (SBCshiftRLreg x y (MOVWconst [c]) flags) -> (SBCshiftRL x y [c] flags) (SBCshiftRAreg x y (MOVWconst [c]) flags) -> (SBCshiftRA x y [c] flags) (SUBSshiftLLreg x y (MOVWconst [c])) -> (SUBSshiftLL x y [c]) (SUBSshiftRLreg x y (MOVWconst [c])) -> (SUBSshiftRL x y [c]) (SUBSshiftRAreg x y (MOVWconst [c])) -> (SUBSshiftRA x y [c]) (RSBshiftLLreg x y (MOVWconst [c])) -> (RSBshiftLL x y [c]) (RSBshiftRLreg x y (MOVWconst [c])) -> (RSBshiftRL x y [c]) (RSBshiftRAreg x y (MOVWconst [c])) -> (RSBshiftRA x y [c]) (RSCshiftLLreg x y (MOVWconst [c]) flags) -> (RSCshiftLL x y [c] flags) (RSCshiftRLreg x y (MOVWconst [c]) flags) -> (RSCshiftRL x y [c] flags) (RSCshiftRAreg x y (MOVWconst [c]) flags) -> (RSCshiftRA x y [c] flags) (RSBSshiftLLreg x y (MOVWconst [c])) -> (RSBSshiftLL x y [c]) (RSBSshiftRLreg x y (MOVWconst [c])) -> (RSBSshiftRL x y [c]) (RSBSshiftRAreg x y (MOVWconst [c])) -> (RSBSshiftRA x y [c]) (ANDshiftLLreg x y (MOVWconst [c])) -> (ANDshiftLL x y [c]) (ANDshiftRLreg x y (MOVWconst [c])) -> (ANDshiftRL x y [c]) (ANDshiftRAreg x y (MOVWconst [c])) -> (ANDshiftRA x y [c]) (ORshiftLLreg x y (MOVWconst [c])) -> (ORshiftLL x y [c]) (ORshiftRLreg x y (MOVWconst [c])) -> (ORshiftRL x y [c]) (ORshiftRAreg x y (MOVWconst [c])) -> (ORshiftRA x y [c]) (XORshiftLLreg x y (MOVWconst [c])) -> (XORshiftLL x y [c]) (XORshiftRLreg x y (MOVWconst [c])) -> (XORshiftRL x y [c]) (XORshiftRAreg x y (MOVWconst [c])) -> (XORshiftRA x y [c]) (BICshiftLLreg x y (MOVWconst [c])) -> (BICshiftLL x y [c]) (BICshiftRLreg x y (MOVWconst [c])) -> (BICshiftRL x y [c]) (BICshiftRAreg x y (MOVWconst [c])) -> (BICshiftRA x y [c]) (MVNshiftLLreg x (MOVWconst [c])) -> (MVNshiftLL x [c]) (MVNshiftRLreg x (MOVWconst [c])) -> (MVNshiftRL x [c]) (MVNshiftRAreg x (MOVWconst [c])) -> (MVNshiftRA x [c]) (CMPshiftLLreg x y (MOVWconst [c])) -> (CMPshiftLL x y [c]) (CMPshiftRLreg x y (MOVWconst [c])) -> (CMPshiftRL x y [c]) (CMPshiftRAreg x y (MOVWconst [c])) -> (CMPshiftRA x y [c]) (TSTshiftLLreg x y (MOVWconst [c])) -> (TSTshiftLL x y [c]) (TSTshiftRLreg x y (MOVWconst [c])) -> (TSTshiftRL x y [c]) (TSTshiftRAreg x y (MOVWconst [c])) -> (TSTshiftRA x y [c]) (TEQshiftLLreg x y (MOVWconst [c])) -> (TEQshiftLL x y [c]) (TEQshiftRLreg x y (MOVWconst [c])) -> (TEQshiftRL x y [c]) (TEQshiftRAreg x y (MOVWconst [c])) -> (TEQshiftRA x y [c]) (CMNshiftLLreg x y (MOVWconst [c])) -> (CMNshiftLL x y [c]) (CMNshiftRLreg x y (MOVWconst [c])) -> (CMNshiftRL x y [c]) (CMNshiftRAreg x y (MOVWconst [c])) -> (CMNshiftRA x y [c]) // Generate rotates (ADDshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) ( ORshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) (XORshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) (ADDshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) ( ORshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) (XORshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) // use indexed loads and stores (MOVWload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVWloadidx ptr idx mem) (MOVWstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVWstoreidx ptr idx val mem) (MOVWload [0] {sym} (ADDshiftLL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftLL ptr idx [c] mem) (MOVWload [0] {sym} (ADDshiftRL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRL ptr idx [c] mem) (MOVWload [0] {sym} (ADDshiftRA ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRA ptr idx [c] mem) (MOVWstore [0] {sym} (ADDshiftLL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftLL ptr idx [c] val mem) (MOVWstore [0] {sym} (ADDshiftRL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRL ptr idx [c] val mem) (MOVWstore [0] {sym} (ADDshiftRA ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRA ptr idx [c] val mem) (MOVBUload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVBUloadidx ptr idx mem) (MOVBload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVBloadidx ptr idx mem) (MOVBstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVBstoreidx ptr idx val mem) (MOVHUload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVHUloadidx ptr idx mem) (MOVHload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVHloadidx ptr idx mem) (MOVHstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVHstoreidx ptr idx val mem) // constant folding in indexed loads and stores (MOVWloadidx ptr (MOVWconst [c]) mem) -> (MOVWload [c] ptr mem) (MOVWloadidx (MOVWconst [c]) ptr mem) -> (MOVWload [c] ptr mem) (MOVBloadidx ptr (MOVWconst [c]) mem) -> (MOVBload [c] ptr mem) (MOVBloadidx (MOVWconst [c]) ptr mem) -> (MOVBload [c] ptr mem) (MOVBUloadidx ptr (MOVWconst [c]) mem) -> (MOVBUload [c] ptr mem) (MOVBUloadidx (MOVWconst [c]) ptr mem) -> (MOVBUload [c] ptr mem) (MOVHUloadidx ptr (MOVWconst [c]) mem) -> (MOVHUload [c] ptr mem) (MOVHUloadidx (MOVWconst [c]) ptr mem) -> (MOVHUload [c] ptr mem) (MOVHloadidx ptr (MOVWconst [c]) mem) -> (MOVHload [c] ptr mem) (MOVHloadidx (MOVWconst [c]) ptr mem) -> (MOVHload [c] ptr mem) (MOVWstoreidx ptr (MOVWconst [c]) val mem) -> (MOVWstore [c] ptr val mem) (MOVWstoreidx (MOVWconst [c]) ptr val mem) -> (MOVWstore [c] ptr val mem) (MOVBstoreidx ptr (MOVWconst [c]) val mem) -> (MOVBstore [c] ptr val mem) (MOVBstoreidx (MOVWconst [c]) ptr val mem) -> (MOVBstore [c] ptr val mem) (MOVHstoreidx ptr (MOVWconst [c]) val mem) -> (MOVHstore [c] ptr val mem) (MOVHstoreidx (MOVWconst [c]) ptr val mem) -> (MOVHstore [c] ptr val mem) (MOVWloadidx ptr (SLLconst idx [c]) mem) -> (MOVWloadshiftLL ptr idx [c] mem) (MOVWloadidx (SLLconst idx [c]) ptr mem) -> (MOVWloadshiftLL ptr idx [c] mem) (MOVWloadidx ptr (SRLconst idx [c]) mem) -> (MOVWloadshiftRL ptr idx [c] mem) (MOVWloadidx (SRLconst idx [c]) ptr mem) -> (MOVWloadshiftRL ptr idx [c] mem) (MOVWloadidx ptr (SRAconst idx [c]) mem) -> (MOVWloadshiftRA ptr idx [c] mem) (MOVWloadidx (SRAconst idx [c]) ptr mem) -> (MOVWloadshiftRA ptr idx [c] mem) (MOVWstoreidx ptr (SLLconst idx [c]) val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) (MOVWstoreidx (SLLconst idx [c]) ptr val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) (MOVWstoreidx ptr (SRLconst idx [c]) val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) (MOVWstoreidx (SRLconst idx [c]) ptr val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) (MOVWstoreidx ptr (SRAconst idx [c]) val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) (MOVWstoreidx (SRAconst idx [c]) ptr val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) (MOVWloadshiftLL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)<<uint64(d))] ptr mem) (MOVWloadshiftRL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)>>uint64(d))] ptr mem) (MOVWloadshiftRA ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(int32(c)>>uint64(d))] ptr mem) (MOVWstoreshiftLL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)<<uint64(d))] ptr val mem) (MOVWstoreshiftRL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)>>uint64(d))] ptr val mem) (MOVWstoreshiftRA ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(int32(c)>>uint64(d))] ptr val mem) // generic simplifications (ADD x (RSBconst [0] y)) -> (SUB x y) (ADD <t> (RSBconst [c] x) (RSBconst [d] y)) -> (RSBconst [c+d] (ADD <t> x y)) (SUB x x) -> (MOVWconst [0]) (RSB x x) -> (MOVWconst [0]) (AND x x) -> x (OR x x) -> x (XOR x x) -> (MOVWconst [0]) (BIC x x) -> (MOVWconst [0]) (ADD (MUL x y) a) -> (MULA x y a) (SUB a (MUL x y)) && objabi.GOARM == 7 -> (MULS x y a) (RSB (MUL x y) a) && objabi.GOARM == 7 -> (MULS x y a) (NEGF (MULF x y)) && objabi.GOARM >= 6 -> (NMULF x y) (NEGD (MULD x y)) && objabi.GOARM >= 6 -> (NMULD x y) (MULF (NEGF x) y) && objabi.GOARM >= 6 -> (NMULF x y) (MULD (NEGD x) y) && objabi.GOARM >= 6 -> (NMULD x y) (NMULF (NEGF x) y) -> (MULF x y) (NMULD (NEGD x) y) -> (MULD x y) // the result will overwrite the addend, since they are in the same register (ADDF a (MULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAF a x y) (ADDF a (NMULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSF a x y) (ADDD a (MULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAD a x y) (ADDD a (NMULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSD a x y) (SUBF a (MULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSF a x y) (SUBF a (NMULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAF a x y) (SUBD a (MULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSD a x y) (SUBD a (NMULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAD a x y) (AND x (MVN y)) -> (BIC x y) // simplification with *shift ops (SUBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) (SUBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) (SUBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) (RSBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) (RSBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) (RSBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) (ANDshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y (ANDshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y (ANDshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y (ORshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y (ORshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y (ORshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y (XORshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) (XORshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) (XORshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) (BICshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) (BICshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) (BICshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) (AND x (MVNshiftLL y [c])) -> (BICshiftLL x y [c]) (AND x (MVNshiftRL y [c])) -> (BICshiftRL x y [c]) (AND x (MVNshiftRA y [c])) -> (BICshiftRA x y [c]) // floating point optimizations (CMPF x (MOVFconst [0])) -> (CMPF0 x) (CMPD x (MOVDconst [0])) -> (CMPD0 x) // bit extraction (SRAconst (SLLconst x [c]) [d]) && objabi.GOARM==7 && uint64(d)>=uint64(c) && uint64(d)<=31 -> (BFX [(d-c)|(32-d)<<8] x) (SRLconst (SLLconst x [c]) [d]) && objabi.GOARM==7 && uint64(d)>=uint64(c) && uint64(d)<=31 -> (BFXU [(d-c)|(32-d)<<8] x) // comparison simplification (CMP x (RSBconst [0] y)) -> (CMN x y) (CMN x (RSBconst [0] y)) -> (CMP x y) (EQ (CMPconst [0] (SUB x y)) yes no) -> (EQ (CMP x y) yes no) (EQ (CMPconst [0] (SUBconst [c] x)) yes no) -> (EQ (CMPconst [c] x) yes no) (EQ (CMPconst [0] (SUBshiftLL x y [c])) yes no) -> (EQ (CMPshiftLL x y [c]) yes no) (EQ (CMPconst [0] (SUBshiftRL x y [c])) yes no) -> (EQ (CMPshiftRL x y [c]) yes no) (EQ (CMPconst [0] (SUBshiftRA x y [c])) yes no) -> (EQ (CMPshiftRA x y [c]) yes no) (EQ (CMPconst [0] (SUBshiftLLreg x y z)) yes no) -> (EQ (CMPshiftLLreg x y z) yes no) (EQ (CMPconst [0] (SUBshiftRLreg x y z)) yes no) -> (EQ (CMPshiftRLreg x y z) yes no) (EQ (CMPconst [0] (SUBshiftRAreg x y z)) yes no) -> (EQ (CMPshiftRAreg x y z) yes no) (NE (CMPconst [0] (SUB x y)) yes no) -> (NE (CMP x y) yes no) (NE (CMPconst [0] (SUBconst [c] x)) yes no) -> (NE (CMPconst [c] x) yes no) (NE (CMPconst [0] (SUBshiftLL x y [c])) yes no) -> (NE (CMPshiftLL x y [c]) yes no) (NE (CMPconst [0] (SUBshiftRL x y [c])) yes no) -> (NE (CMPshiftRL x y [c]) yes no) (NE (CMPconst [0] (SUBshiftRA x y [c])) yes no) -> (NE (CMPshiftRA x y [c]) yes no) (NE (CMPconst [0] (SUBshiftLLreg x y z)) yes no) -> (NE (CMPshiftLLreg x y z) yes no) (NE (CMPconst [0] (SUBshiftRLreg x y z)) yes no) -> (NE (CMPshiftRLreg x y z) yes no) (NE (CMPconst [0] (SUBshiftRAreg x y z)) yes no) -> (NE (CMPshiftRAreg x y z) yes no) (EQ (CMPconst [0] (ADD x y)) yes no) -> (EQ (CMN x y) yes no) (EQ (CMPconst [0] (ADDconst [c] x)) yes no) -> (EQ (CMNconst [c] x) yes no) (EQ (CMPconst [0] (ADDshiftLL x y [c])) yes no) -> (EQ (CMNshiftLL x y [c]) yes no) (EQ (CMPconst [0] (ADDshiftRL x y [c])) yes no) -> (EQ (CMNshiftRL x y [c]) yes no) (EQ (CMPconst [0] (ADDshiftRA x y [c])) yes no) -> (EQ (CMNshiftRA x y [c]) yes no) (EQ (CMPconst [0] (ADDshiftLLreg x y z)) yes no) -> (EQ (CMNshiftLLreg x y z) yes no) (EQ (CMPconst [0] (ADDshiftRLreg x y z)) yes no) -> (EQ (CMNshiftRLreg x y z) yes no) (EQ (CMPconst [0] (ADDshiftRAreg x y z)) yes no) -> (EQ (CMNshiftRAreg x y z) yes no) (NE (CMPconst [0] (ADD x y)) yes no) -> (NE (CMN x y) yes no) (NE (CMPconst [0] (ADDconst [c] x)) yes no) -> (NE (CMNconst [c] x) yes no) (NE (CMPconst [0] (ADDshiftLL x y [c])) yes no) -> (NE (CMNshiftLL x y [c]) yes no) (NE (CMPconst [0] (ADDshiftRL x y [c])) yes no) -> (NE (CMNshiftRL x y [c]) yes no) (NE (CMPconst [0] (ADDshiftRA x y [c])) yes no) -> (NE (CMNshiftRA x y [c]) yes no) (NE (CMPconst [0] (ADDshiftLLreg x y z)) yes no) -> (NE (CMNshiftLLreg x y z) yes no) (NE (CMPconst [0] (ADDshiftRLreg x y z)) yes no) -> (NE (CMNshiftRLreg x y z) yes no) (NE (CMPconst [0] (ADDshiftRAreg x y z)) yes no) -> (NE (CMNshiftRAreg x y z) yes no) (EQ (CMPconst [0] (AND x y)) yes no) -> (EQ (TST x y) yes no) (EQ (CMPconst [0] (ANDconst [c] x)) yes no) -> (EQ (TSTconst [c] x) yes no) (EQ (CMPconst [0] (ANDshiftLL x y [c])) yes no) -> (EQ (TSTshiftLL x y [c]) yes no) (EQ (CMPconst [0] (ANDshiftRL x y [c])) yes no) -> (EQ (TSTshiftRL x y [c]) yes no) (EQ (CMPconst [0] (ANDshiftRA x y [c])) yes no) -> (EQ (TSTshiftRA x y [c]) yes no) (EQ (CMPconst [0] (ANDshiftLLreg x y z)) yes no) -> (EQ (TSTshiftLLreg x y z) yes no) (EQ (CMPconst [0] (ANDshiftRLreg x y z)) yes no) -> (EQ (TSTshiftRLreg x y z) yes no) (EQ (CMPconst [0] (ANDshiftRAreg x y z)) yes no) -> (EQ (TSTshiftRAreg x y z) yes no) (NE (CMPconst [0] (AND x y)) yes no) -> (NE (TST x y) yes no) (NE (CMPconst [0] (ANDconst [c] x)) yes no) -> (NE (TSTconst [c] x) yes no) (NE (CMPconst [0] (ANDshiftLL x y [c])) yes no) -> (NE (TSTshiftLL x y [c]) yes no) (NE (CMPconst [0] (ANDshiftRL x y [c])) yes no) -> (NE (TSTshiftRL x y [c]) yes no) (NE (CMPconst [0] (ANDshiftRA x y [c])) yes no) -> (NE (TSTshiftRA x y [c]) yes no) (NE (CMPconst [0] (ANDshiftLLreg x y z)) yes no) -> (NE (TSTshiftLLreg x y z) yes no) (NE (CMPconst [0] (ANDshiftRLreg x y z)) yes no) -> (NE (TSTshiftRLreg x y z) yes no) (NE (CMPconst [0] (ANDshiftRAreg x y z)) yes no) -> (NE (TSTshiftRAreg x y z) yes no) (EQ (CMPconst [0] (XOR x y)) yes no) -> (EQ (TEQ x y) yes no) (EQ (CMPconst [0] (XORconst [c] x)) yes no) -> (EQ (TEQconst [c] x) yes no) (EQ (CMPconst [0] (XORshiftLL x y [c])) yes no) -> (EQ (TEQshiftLL x y [c]) yes no) (EQ (CMPconst [0] (XORshiftRL x y [c])) yes no) -> (EQ (TEQshiftRL x y [c]) yes no) (EQ (CMPconst [0] (XORshiftRA x y [c])) yes no) -> (EQ (TEQshiftRA x y [c]) yes no) (EQ (CMPconst [0] (XORshiftLLreg x y z)) yes no) -> (EQ (TEQshiftLLreg x y z) yes no) (EQ (CMPconst [0] (XORshiftRLreg x y z)) yes no) -> (EQ (TEQshiftRLreg x y z) yes no) (EQ (CMPconst [0] (XORshiftRAreg x y z)) yes no) -> (EQ (TEQshiftRAreg x y z) yes no) (NE (CMPconst [0] (XOR x y)) yes no) -> (NE (TEQ x y) yes no) (NE (CMPconst [0] (XORconst [c] x)) yes no) -> (NE (TEQconst [c] x) yes no) (NE (CMPconst [0] (XORshiftLL x y [c])) yes no) -> (NE (TEQshiftLL x y [c]) yes no) (NE (CMPconst [0] (XORshiftRL x y [c])) yes no) -> (NE (TEQshiftRL x y [c]) yes no) (NE (CMPconst [0] (XORshiftRA x y [c])) yes no) -> (NE (TEQshiftRA x y [c]) yes no) (NE (CMPconst [0] (XORshiftLLreg x y z)) yes no) -> (NE (TEQshiftLLreg x y z) yes no) (NE (CMPconst [0] (XORshiftRLreg x y z)) yes no) -> (NE (TEQshiftRLreg x y z) yes no) (NE (CMPconst [0] (XORshiftRAreg x y z)) yes no) -> (NE (TEQshiftRAreg x y z) yes no)