// Copyright 2016, VIXL authors
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// * Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
// * Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
// * Neither the name of ARM Limited nor the names of its contributors may be
// used to endorse or promote products derived from this software without
// specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// -----------------------------------------------------------------------------
// This file is auto generated from the
// test/aarch32/config/template-assembler-aarch32.cc.in template file using
// tools/generate_tests.py.
//
// PLEASE DO NOT EDIT.
// -----------------------------------------------------------------------------
#include "test-runner.h"
#include "test-utils.h"
#include "test-utils-aarch32.h"
#include "aarch32/assembler-aarch32.h"
#include "aarch32/macro-assembler-aarch32.h"
#define BUF_SIZE (4096)
namespace vixl {
namespace aarch32 {
// List of instruction mnemonics.
#define FOREACH_INSTRUCTION(M) \
M(ldr) \
M(ldrb) \
M(str) \
M(strb)
// The following definitions are defined again in each generated test, therefore
// we need to place them in an anomymous namespace. It expresses that they are
// local to this file only, and the compiler is not allowed to share these types
// across test files during template instantiation. Specifically, `Operands` has
// various layouts across generated tests so it absolutely cannot be shared.
#ifdef VIXL_INCLUDE_TARGET_A32
namespace {
// Values to be passed to the assembler to produce the instruction under test.
struct Operands {
Condition cond;
Register rd;
Register rn;
Sign sign;
int32_t offset;
AddrMode addr_mode;
};
// This structure contains all data needed to test one specific
// instruction.
struct TestData {
// The `operands` field represents what to pass to the assembler to
// produce the instruction.
Operands operands;
// True if we need to generate an IT instruction for this test to be valid.
bool in_it_block;
// The condition to give the IT instruction, this will be set to "al" by
// default.
Condition it_condition;
// Description of the operands, used for error reporting.
const char* operands_description;
// Unique identifier, used for generating traces.
const char* identifier;
};
struct TestResult {
size_t size;
const byte* encoding;
};
// Each element of this array produce one instruction encoding.
const TestData kTests[] = {{{pl, r13, r0, plus, 0, Offset},
false,
al,
"pl r13 r0 plus 0 Offset",
"pl_r13_r0_plus_0_Offset"},
{{ge, r5, r3, plus, 0, Offset},
false,
al,
"ge r5 r3 plus 0 Offset",
"ge_r5_r3_plus_0_Offset"},
{{cc, r0, r4, plus, 0, Offset},
false,
al,
"cc r0 r4 plus 0 Offset",
"cc_r0_r4_plus_0_Offset"},
{{ge, r0, r0, plus, 0, Offset},
false,
al,
"ge r0 r0 plus 0 Offset",
"ge_r0_r0_plus_0_Offset"},
{{eq, r12, r3, plus, 0, Offset},
false,
al,
"eq r12 r3 plus 0 Offset",
"eq_r12_r3_plus_0_Offset"},
{{al, r4, r13, plus, 0, Offset},
false,
al,
"al r4 r13 plus 0 Offset",
"al_r4_r13_plus_0_Offset"},
{{mi, r8, r2, plus, 0, Offset},
false,
al,
"mi r8 r2 plus 0 Offset",
"mi_r8_r2_plus_0_Offset"},
{{mi, r6, r9, plus, 0, Offset},
false,
al,
"mi r6 r9 plus 0 Offset",
"mi_r6_r9_plus_0_Offset"},
{{gt, r13, r11, plus, 0, Offset},
false,
al,
"gt r13 r11 plus 0 Offset",
"gt_r13_r11_plus_0_Offset"},
{{cs, r0, r7, plus, 0, Offset},
false,
al,
"cs r0 r7 plus 0 Offset",
"cs_r0_r7_plus_0_Offset"},
{{ge, r7, r11, plus, 0, Offset},
false,
al,
"ge r7 r11 plus 0 Offset",
"ge_r7_r11_plus_0_Offset"},
{{pl, r11, r12, plus, 0, Offset},
false,
al,
"pl r11 r12 plus 0 Offset",
"pl_r11_r12_plus_0_Offset"},
{{cs, r2, r12, plus, 0, Offset},
false,
al,
"cs r2 r12 plus 0 Offset",
"cs_r2_r12_plus_0_Offset"},
{{vc, r2, r14, plus, 0, Offset},
false,
al,
"vc r2 r14 plus 0 Offset",
"vc_r2_r14_plus_0_Offset"},
{{le, r13, r6, plus, 0, Offset},
false,
al,
"le r13 r6 plus 0 Offset",
"le_r13_r6_plus_0_Offset"},
{{ls, r1, r2, plus, 0, Offset},
false,
al,
"ls r1 r2 plus 0 Offset",
"ls_r1_r2_plus_0_Offset"},
{{cc, r1, r6, plus, 0, Offset},
false,
al,
"cc r1 r6 plus 0 Offset",
"cc_r1_r6_plus_0_Offset"},
{{al, r10, r3, plus, 0, Offset},
false,
al,
"al r10 r3 plus 0 Offset",
"al_r10_r3_plus_0_Offset"},
{{al, r7, r9, plus, 0, Offset},
false,
al,
"al r7 r9 plus 0 Offset",
"al_r7_r9_plus_0_Offset"},
{{vs, r5, r3, plus, 0, Offset},
false,
al,
"vs r5 r3 plus 0 Offset",
"vs_r5_r3_plus_0_Offset"},
{{pl, r4, r4, plus, 0, Offset},
false,
al,
"pl r4 r4 plus 0 Offset",
"pl_r4_r4_plus_0_Offset"},
{{ne, r11, r9, plus, 0, Offset},
false,
al,
"ne r11 r9 plus 0 Offset",
"ne_r11_r9_plus_0_Offset"},
{{cc, r7, r14, plus, 0, Offset},
false,
al,
"cc r7 r14 plus 0 Offset",
"cc_r7_r14_plus_0_Offset"},
{{ne, r9, r3, plus, 0, Offset},
false,
al,
"ne r9 r3 plus 0 Offset",
"ne_r9_r3_plus_0_Offset"},
{{cc, r6, r14, plus, 0, Offset},
false,
al,
"cc r6 r14 plus 0 Offset",
"cc_r6_r14_plus_0_Offset"},
{{ne, r14, r14, plus, 0, Offset},
false,
al,
"ne r14 r14 plus 0 Offset",
"ne_r14_r14_plus_0_Offset"},
{{al, r13, r14, plus, 0, Offset},
false,
al,
"al r13 r14 plus 0 Offset",
"al_r13_r14_plus_0_Offset"},
{{cc, r3, r1, plus, 0, Offset},
false,
al,
"cc r3 r1 plus 0 Offset",
"cc_r3_r1_plus_0_Offset"},
{{ge, r1, r2, plus, 0, Offset},
false,
al,
"ge r1 r2 plus 0 Offset",
"ge_r1_r2_plus_0_Offset"},
{{eq, r3, r4, plus, 0, Offset},
false,
al,
"eq r3 r4 plus 0 Offset",
"eq_r3_r4_plus_0_Offset"},
{{al, r5, r10, plus, 0, Offset},
false,
al,
"al r5 r10 plus 0 Offset",
"al_r5_r10_plus_0_Offset"},
{{mi, r1, r3, plus, 0, Offset},
false,
al,
"mi r1 r3 plus 0 Offset",
"mi_r1_r3_plus_0_Offset"},
{{gt, r1, r4, plus, 0, Offset},
false,
al,
"gt r1 r4 plus 0 Offset",
"gt_r1_r4_plus_0_Offset"},
{{al, r7, r12, plus, 0, Offset},
false,
al,
"al r7 r12 plus 0 Offset",
"al_r7_r12_plus_0_Offset"},
{{ge, r14, r2, plus, 0, Offset},
false,
al,
"ge r14 r2 plus 0 Offset",
"ge_r14_r2_plus_0_Offset"},
{{le, r9, r7, plus, 0, Offset},
false,
al,
"le r9 r7 plus 0 Offset",
"le_r9_r7_plus_0_Offset"},
{{al, r9, r14, plus, 0, Offset},
false,
al,
"al r9 r14 plus 0 Offset",
"al_r9_r14_plus_0_Offset"},
{{hi, r10, r12, plus, 0, Offset},
false,
al,
"hi r10 r12 plus 0 Offset",
"hi_r10_r12_plus_0_Offset"},
{{le, r6, r5, plus, 0, Offset},
false,
al,
"le r6 r5 plus 0 Offset",
"le_r6_r5_plus_0_Offset"},
{{cs, r14, r12, plus, 0, Offset},
false,
al,
"cs r14 r12 plus 0 Offset",
"cs_r14_r12_plus_0_Offset"},
{{vc, r6, r9, plus, 0, Offset},
false,
al,
"vc r6 r9 plus 0 Offset",
"vc_r6_r9_plus_0_Offset"},
{{ne, r3, r9, plus, 0, Offset},
false,
al,
"ne r3 r9 plus 0 Offset",
"ne_r3_r9_plus_0_Offset"},
{{lt, r2, r9, plus, 0, Offset},
false,
al,
"lt r2 r9 plus 0 Offset",
"lt_r2_r9_plus_0_Offset"},
{{vc, r5, r11, plus, 0, Offset},
false,
al,
"vc r5 r11 plus 0 Offset",
"vc_r5_r11_plus_0_Offset"},
{{gt, r5, r1, plus, 0, Offset},
false,
al,
"gt r5 r1 plus 0 Offset",
"gt_r5_r1_plus_0_Offset"},
{{al, r12, r4, plus, 0, Offset},
false,
al,
"al r12 r4 plus 0 Offset",
"al_r12_r4_plus_0_Offset"},
{{ls, r11, r10, plus, 0, Offset},
false,
al,
"ls r11 r10 plus 0 Offset",
"ls_r11_r10_plus_0_Offset"},
{{eq, r14, r7, plus, 0, Offset},
false,
al,
"eq r14 r7 plus 0 Offset",
"eq_r14_r7_plus_0_Offset"},
{{vc, r7, r0, plus, 0, Offset},
false,
al,
"vc r7 r0 plus 0 Offset",
"vc_r7_r0_plus_0_Offset"},
{{le, r2, r6, plus, 0, Offset},
false,
al,
"le r2 r6 plus 0 Offset",
"le_r2_r6_plus_0_Offset"},
{{gt, r2, r6, plus, 0, Offset},
false,
al,
"gt r2 r6 plus 0 Offset",
"gt_r2_r6_plus_0_Offset"},
{{al, r6, r6, plus, 0, Offset},
false,
al,
"al r6 r6 plus 0 Offset",
"al_r6_r6_plus_0_Offset"},
{{ls, r10, r8, plus, 0, Offset},
false,
al,
"ls r10 r8 plus 0 Offset",
"ls_r10_r8_plus_0_Offset"},
{{lt, r5, r8, plus, 0, Offset},
false,
al,
"lt r5 r8 plus 0 Offset",
"lt_r5_r8_plus_0_Offset"},
{{vs, r13, r14, plus, 0, Offset},
false,
al,
"vs r13 r14 plus 0 Offset",
"vs_r13_r14_plus_0_Offset"},
{{gt, r9, r7, plus, 0, Offset},
false,
al,
"gt r9 r7 plus 0 Offset",
"gt_r9_r7_plus_0_Offset"},
{{cc, r8, r9, plus, 0, Offset},
false,
al,
"cc r8 r9 plus 0 Offset",
"cc_r8_r9_plus_0_Offset"},
{{le, r2, r7, plus, 0, Offset},
false,
al,
"le r2 r7 plus 0 Offset",
"le_r2_r7_plus_0_Offset"},
{{ge, r0, r1, plus, 0, Offset},
false,
al,
"ge r0 r1 plus 0 Offset",
"ge_r0_r1_plus_0_Offset"},
{{eq, r10, r14, plus, 0, Offset},
false,
al,
"eq r10 r14 plus 0 Offset",
"eq_r10_r14_plus_0_Offset"},
{{ls, r3, r3, plus, 0, Offset},
false,
al,
"ls r3 r3 plus 0 Offset",
"ls_r3_r3_plus_0_Offset"},
{{mi, r11, r6, plus, 0, Offset},
false,
al,
"mi r11 r6 plus 0 Offset",
"mi_r11_r6_plus_0_Offset"},
{{ne, r14, r12, plus, 0, Offset},
false,
al,
"ne r14 r12 plus 0 Offset",
"ne_r14_r12_plus_0_Offset"},
{{vs, r1, r12, plus, 0, Offset},
false,
al,
"vs r1 r12 plus 0 Offset",
"vs_r1_r12_plus_0_Offset"},
{{ls, r0, r0, plus, 0, Offset},
false,
al,
"ls r0 r0 plus 0 Offset",
"ls_r0_r0_plus_0_Offset"},
{{lt, r12, r14, plus, 0, Offset},
false,
al,
"lt r12 r14 plus 0 Offset",
"lt_r12_r14_plus_0_Offset"},
{{lt, r13, r9, plus, 0, Offset},
false,
al,
"lt r13 r9 plus 0 Offset",
"lt_r13_r9_plus_0_Offset"},
{{ge, r13, r9, plus, 0, Offset},
false,
al,
"ge r13 r9 plus 0 Offset",
"ge_r13_r9_plus_0_Offset"},
{{cs, r11, r0, plus, 0, Offset},
false,
al,
"cs r11 r0 plus 0 Offset",
"cs_r11_r0_plus_0_Offset"},
{{hi, r13, r11, plus, 0, Offset},
false,
al,
"hi r13 r11 plus 0 Offset",
"hi_r13_r11_plus_0_Offset"},
{{cs, r13, r9, plus, 0, Offset},
false,
al,
"cs r13 r9 plus 0 Offset",
"cs_r13_r9_plus_0_Offset"},
{{ne, r10, r10, plus, 0, Offset},
false,
al,
"ne r10 r10 plus 0 Offset",
"ne_r10_r10_plus_0_Offset"},
{{vc, r13, r9, plus, 0, Offset},
false,
al,
"vc r13 r9 plus 0 Offset",
"vc_r13_r9_plus_0_Offset"},
{{vc, r9, r3, plus, 0, Offset},
false,
al,
"vc r9 r3 plus 0 Offset",
"vc_r9_r3_plus_0_Offset"},
{{cc, r10, r4, plus, 0, Offset},
false,
al,
"cc r10 r4 plus 0 Offset",
"cc_r10_r4_plus_0_Offset"},
{{hi, r6, r6, plus, 0, Offset},
false,
al,
"hi r6 r6 plus 0 Offset",
"hi_r6_r6_plus_0_Offset"},
{{le, r11, r1, plus, 0, Offset},
false,
al,
"le r11 r1 plus 0 Offset",
"le_r11_r1_plus_0_Offset"},
{{gt, r3, r5, plus, 0, Offset},
false,
al,
"gt r3 r5 plus 0 Offset",
"gt_r3_r5_plus_0_Offset"},
{{lt, r0, r10, plus, 0, Offset},
false,
al,
"lt r0 r10 plus 0 Offset",
"lt_r0_r10_plus_0_Offset"},
{{vs, r6, r0, plus, 0, Offset},
false,
al,
"vs r6 r0 plus 0 Offset",
"vs_r6_r0_plus_0_Offset"},
{{vs, r8, r9, plus, 0, Offset},
false,
al,
"vs r8 r9 plus 0 Offset",
"vs_r8_r9_plus_0_Offset"},
{{mi, r9, r7, plus, 0, Offset},
false,
al,
"mi r9 r7 plus 0 Offset",
"mi_r9_r7_plus_0_Offset"},
{{vs, r12, r11, plus, 0, Offset},
false,
al,
"vs r12 r11 plus 0 Offset",
"vs_r12_r11_plus_0_Offset"},
{{vc, r11, r7, plus, 0, Offset},
false,
al,
"vc r11 r7 plus 0 Offset",
"vc_r11_r7_plus_0_Offset"},
{{hi, r11, r5, plus, 0, Offset},
false,
al,
"hi r11 r5 plus 0 Offset",
"hi_r11_r5_plus_0_Offset"},
{{lt, r0, r11, plus, 0, Offset},
false,
al,
"lt r0 r11 plus 0 Offset",
"lt_r0_r11_plus_0_Offset"},
{{ne, r11, r1, plus, 0, Offset},
false,
al,
"ne r11 r1 plus 0 Offset",
"ne_r11_r1_plus_0_Offset"},
{{ls, r5, r13, plus, 0, Offset},
false,
al,
"ls r5 r13 plus 0 Offset",
"ls_r5_r13_plus_0_Offset"},
{{gt, r13, r3, plus, 0, Offset},
false,
al,
"gt r13 r3 plus 0 Offset",
"gt_r13_r3_plus_0_Offset"},
{{vs, r12, r12, plus, 0, Offset},
false,
al,
"vs r12 r12 plus 0 Offset",
"vs_r12_r12_plus_0_Offset"},
{{mi, r12, r7, plus, 0, Offset},
false,
al,
"mi r12 r7 plus 0 Offset",
"mi_r12_r7_plus_0_Offset"},
{{le, r3, r4, plus, 0, Offset},
false,
al,
"le r3 r4 plus 0 Offset",
"le_r3_r4_plus_0_Offset"},
{{ne, r11, r10, plus, 0, Offset},
false,
al,
"ne r11 r10 plus 0 Offset",
"ne_r11_r10_plus_0_Offset"},
{{gt, r6, r13, plus, 0, Offset},
false,
al,
"gt r6 r13 plus 0 Offset",
"gt_r6_r13_plus_0_Offset"},
{{hi, r4, r8, plus, 0, Offset},
false,
al,
"hi r4 r8 plus 0 Offset",
"hi_r4_r8_plus_0_Offset"},
{{ge, r14, r5, plus, 0, Offset},
false,
al,
"ge r14 r5 plus 0 Offset",
"ge_r14_r5_plus_0_Offset"},
{{vc, r9, r6, plus, 0, Offset},
false,
al,
"vc r9 r6 plus 0 Offset",
"vc_r9_r6_plus_0_Offset"},
{{le, r2, r9, plus, 0, Offset},
false,
al,
"le r2 r9 plus 0 Offset",
"le_r2_r9_plus_0_Offset"},
{{ne, r10, r4, plus, 0, Offset},
false,
al,
"ne r10 r4 plus 0 Offset",
"ne_r10_r4_plus_0_Offset"},
{{vs, r10, r14, plus, 0, Offset},
false,
al,
"vs r10 r14 plus 0 Offset",
"vs_r10_r14_plus_0_Offset"},
{{al, r0, r11, minus, 2628, Offset},
false,
al,
"al r0 r11 minus 2628 Offset",
"al_r0_r11_minus_2628_Offset"},
{{al, r0, r9, minus, 136, Offset},
false,
al,
"al r0 r9 minus 136 Offset",
"al_r0_r9_minus_136_Offset"},
{{al, r0, r9, plus, 2323, Offset},
false,
al,
"al r0 r9 plus 2323 Offset",
"al_r0_r9_plus_2323_Offset"},
{{al, r0, r12, plus, 138, Offset},
false,
al,
"al r0 r12 plus 138 Offset",
"al_r0_r12_plus_138_Offset"},
{{al, r0, r13, plus, 3266, Offset},
false,
al,
"al r0 r13 plus 3266 Offset",
"al_r0_r13_plus_3266_Offset"},
{{al, r0, r8, minus, 2052, Offset},
false,
al,
"al r0 r8 minus 2052 Offset",
"al_r0_r8_minus_2052_Offset"},
{{al, r0, r9, minus, 1922, Offset},
false,
al,
"al r0 r9 minus 1922 Offset",
"al_r0_r9_minus_1922_Offset"},
{{al, r0, r13, minus, 3659, Offset},
false,
al,
"al r0 r13 minus 3659 Offset",
"al_r0_r13_minus_3659_Offset"},
{{al, r0, r14, minus, 1043, Offset},
false,
al,
"al r0 r14 minus 1043 Offset",
"al_r0_r14_minus_1043_Offset"},
{{al, r0, r5, minus, 3772, Offset},
false,
al,
"al r0 r5 minus 3772 Offset",
"al_r0_r5_minus_3772_Offset"},
{{al, r0, r0, plus, 188, Offset},
false,
al,
"al r0 r0 plus 188 Offset",
"al_r0_r0_plus_188_Offset"},
{{al, r0, r0, plus, 1407, Offset},
false,
al,
"al r0 r0 plus 1407 Offset",
"al_r0_r0_plus_1407_Offset"},
{{al, r0, r7, plus, 872, Offset},
false,
al,
"al r0 r7 plus 872 Offset",
"al_r0_r7_plus_872_Offset"},
{{al, r0, r4, minus, 3109, Offset},
false,
al,
"al r0 r4 minus 3109 Offset",
"al_r0_r4_minus_3109_Offset"},
{{al, r0, r13, plus, 1665, Offset},
false,
al,
"al r0 r13 plus 1665 Offset",
"al_r0_r13_plus_1665_Offset"},
{{al, r0, r1, plus, 3636, Offset},
false,
al,
"al r0 r1 plus 3636 Offset",
"al_r0_r1_plus_3636_Offset"},
{{al, r0, r6, minus, 770, Offset},
false,
al,
"al r0 r6 minus 770 Offset",
"al_r0_r6_minus_770_Offset"},
{{al, r0, r11, minus, 2703, Offset},
false,
al,
"al r0 r11 minus 2703 Offset",
"al_r0_r11_minus_2703_Offset"},
{{al, r0, r9, minus, 3504, Offset},
false,
al,
"al r0 r9 minus 3504 Offset",
"al_r0_r9_minus_3504_Offset"},
{{al, r0, r5, minus, 3425, Offset},
false,
al,
"al r0 r5 minus 3425 Offset",
"al_r0_r5_minus_3425_Offset"},
{{al, r0, r2, minus, 138, Offset},
false,
al,
"al r0 r2 minus 138 Offset",
"al_r0_r2_minus_138_Offset"},
{{al, r0, r0, minus, 470, Offset},
false,
al,
"al r0 r0 minus 470 Offset",
"al_r0_r0_minus_470_Offset"},
{{al, r0, r14, plus, 1472, Offset},
false,
al,
"al r0 r14 plus 1472 Offset",
"al_r0_r14_plus_1472_Offset"},
{{al, r0, r14, plus, 4058, Offset},
false,
al,
"al r0 r14 plus 4058 Offset",
"al_r0_r14_plus_4058_Offset"},
{{al, r0, r5, plus, 513, Offset},
false,
al,
"al r0 r5 plus 513 Offset",
"al_r0_r5_plus_513_Offset"},
{{al, r0, r11, minus, 791, Offset},
false,
al,
"al r0 r11 minus 791 Offset",
"al_r0_r11_minus_791_Offset"},
{{al, r0, r5, minus, 441, Offset},
false,
al,
"al r0 r5 minus 441 Offset",
"al_r0_r5_minus_441_Offset"},
{{al, r0, r11, plus, 1266, Offset},
false,
al,
"al r0 r11 plus 1266 Offset",
"al_r0_r11_plus_1266_Offset"},
{{al, r0, r4, plus, 2901, Offset},
false,
al,
"al r0 r4 plus 2901 Offset",
"al_r0_r4_plus_2901_Offset"},
{{al, r0, r12, minus, 1394, Offset},
false,
al,
"al r0 r12 minus 1394 Offset",
"al_r0_r12_minus_1394_Offset"},
{{al, r0, r7, plus, 1651, Offset},
false,
al,
"al r0 r7 plus 1651 Offset",
"al_r0_r7_plus_1651_Offset"},
{{al, r0, r9, plus, 2710, Offset},
false,
al,
"al r0 r9 plus 2710 Offset",
"al_r0_r9_plus_2710_Offset"},
{{al, r0, r12, plus, 1845, Offset},
false,
al,
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{{al, r0, r6, minus, 3417, Offset},
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{{al, r7, r9, plus, 2026, PostIndex},
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{{al, r0, r2, plus, 1159, PreIndex},
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{{al, r5, r7, plus, 2628, PreIndex},
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{{al, r7, r1, plus, 1665, PreIndex},
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{{al, r0, r9, minus, 53, PreIndex},
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{{al, r0, r2, plus, 459, PostIndex},
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{{al, r9, r7, plus, 2994, PreIndex},
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{{al, r11, r3, minus, 3585, PreIndex},
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{{al, r2, r12, plus, 3811, PreIndex},
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{{al, r13, r3, plus, 322, PreIndex},
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{{al, r13, r9, plus, 2628, PreIndex},
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{{al, r1, r14, minus, 2311, PostIndex},
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{{al, r0, r13, minus, 1050, PreIndex},
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{{al, r2, r4, minus, 915, PostIndex},
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{{al, r2, r3, minus, 3918, PostIndex},
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{{al, r0, r13, minus, 2901, PreIndex},
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{{al, r14, r8, minus, 960, PreIndex},
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{{al, r10, r2, minus, 3425, PostIndex},
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{{al, r2, r0, minus, 210, PostIndex},
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{{al, r4, r5, minus, 2052, PreIndex},
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{{al, r5, r0, minus, 1922, PostIndex},
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{{al, r7, r8, minus, 3256, PostIndex},
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{{al, r5, r13, plus, 1695, PostIndex},
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{{al, r3, r14, plus, 844, PreIndex},
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{{al, r3, r7, minus, 3914, PreIndex},
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{{al, r4, r6, minus, 3256, PostIndex},
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{{al, r11, r12, minus, 2338, PreIndex},
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{{al, r0, r12, minus, 2046, PreIndex},
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{{al, r6, r10, minus, 3739, PostIndex},
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{{al, r7, r1, minus, 3633, PreIndex},
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{{al, r10, r6, plus, 2358, PreIndex},
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{{al, r4, r6, plus, 3139, PreIndex},
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{{al, r14, r2, plus, 398, PreIndex},
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{{al, r13, r7, plus, 1867, PostIndex},
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{{al, r6, r7, plus, 831, PostIndex},
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{{al, r10, r6, plus, 4, PreIndex},
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{{al, r9, r0, plus, 1835, PreIndex},
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{{al, r0, r2, minus, 1438, PreIndex},
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{{al, r6, r2, plus, 3522, PreIndex},
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{{al, r1, r4, minus, 3069, PreIndex},
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{{al, r0, r5, plus, 1348, PreIndex},
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{{al, r4, r14, minus, 1537, PostIndex},
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{{al, r9, r7, plus, 213, PostIndex},
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{{al, r4, r1, plus, 3771, PreIndex},
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{{al, r1, r4, minus, 2016, PreIndex},
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{{al, r4, r12, minus, 1241, PreIndex},
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{{al, r10, r5, minus, 3391, PreIndex},
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{{al, r0, r4, plus, 2689, PreIndex},
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"al r14 r12 plus 2588 PostIndex",
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{{al, r11, r14, minus, 1234, PostIndex},
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"al r11 r14 minus 1234 PostIndex",
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{{al, r2, r0, minus, 1699, PostIndex},
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"al r2 r0 minus 1699 PostIndex",
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"al r9 r10 minus 3399 PreIndex",
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{{al, r10, r8, minus, 132, PreIndex},
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{{al, r13, r6, plus, 496, PreIndex},
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{{al, r12, r9, minus, 188, PreIndex},
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{{al, r9, r2, minus, 612, PostIndex},
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{{al, r8, r13, minus, 2929, PreIndex},
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{{al, r6, r12, plus, 1372, PreIndex},
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{{al, r3, r10, plus, 1967, PreIndex},
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{{al, r12, r13, minus, 2726, PreIndex},
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{{al, r2, r12, plus, 542, PreIndex},
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{{al, r4, r12, minus, 3989, PreIndex},
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{{al, r8, r14, plus, 2311, PostIndex},
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{{al, r8, r11, minus, 1479, PostIndex},
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"al r8 r11 minus 1479 PostIndex",
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{{al, r4, r3, plus, 988, PostIndex},
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"al r4 r3 plus 988 PostIndex",
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{{al, r9, r6, minus, 1017, PostIndex},
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"al r9 r6 minus 1017 PostIndex",
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{{al, r13, r10, plus, 2038, PreIndex},
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{{al, r10, r0, plus, 999, PreIndex},
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"al r10 r0 plus 999 PreIndex",
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{{al, r2, r1, minus, 1870, PostIndex},
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{{al, r3, r10, minus, 459, PreIndex},
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{{al, r13, r6, minus, 2245, PostIndex},
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"al r13 r6 minus 2245 PostIndex",
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{{al, r2, r11, minus, 3397, PostIndex},
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al,
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{{al, r13, r2, minus, 479, PreIndex},
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{{al, r9, r7, minus, 3069, PreIndex},
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{{al, r2, r6, plus, 462, PostIndex},
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al,
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{{al, r4, r7, minus, 2026, PostIndex},
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al,
"al r4 r7 minus 2026 PostIndex",
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{{al, r1, r5, minus, 969, PostIndex},
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al,
"al r1 r5 minus 969 PostIndex",
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{{al, r2, r4, minus, 3752, PostIndex},
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al,
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{{al, r6, r2, plus, 3583, PreIndex},
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al,
"al r6 r2 plus 3583 PreIndex",
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{{al, r12, r10, plus, 2906, PreIndex},
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al,
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al,
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{{al, r8, r2, minus, 3541, PreIndex},
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{{al, r2, r10, plus, 1860, PostIndex},
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{{al, r11, r0, plus, 429, PreIndex},
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{{al, r11, r12, minus, 2775, PostIndex},
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al,
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{{al, r4, r10, minus, 2689, PreIndex},
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al,
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{{al, r8, r12, plus, 462, PostIndex},
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al,
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{{al, r13, r14, plus, 2792, PreIndex},
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al,
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{{al, r7, r9, plus, 2338, PostIndex},
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{{al, r13, r5, minus, 766, PostIndex},
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{{al, r5, r1, minus, 2794, PreIndex},
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al,
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{{al, r9, r4, plus, 2800, PreIndex},
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{{al, r0, r8, minus, 523, PostIndex},
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al,
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{{al, r9, r8, minus, 2507, PostIndex},
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al,
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{{al, r0, r1, minus, 3696, PostIndex},
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{{al, r3, r2, plus, 2617, PreIndex},
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al,
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{{al, r5, r4, plus, 4095, PostIndex},
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al,
"al r5 r4 plus 4095 PostIndex",
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{{al, r7, r8, minus, 955, PreIndex},
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al,
"al r7 r8 minus 955 PreIndex",
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{{al, r4, r9, minus, 3079, PreIndex},
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al,
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{{al, r7, r1, minus, 1017, PostIndex},
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al,
"al r7 r1 minus 1017 PostIndex",
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{{al, r3, r1, minus, 1437, PostIndex},
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al,
"al r3 r1 minus 1437 PostIndex",
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{{al, r10, r12, plus, 3529, PostIndex},
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al,
"al r10 r12 plus 3529 PostIndex",
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{{al, r4, r6, minus, 565, PreIndex},
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al,
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{{al, r5, r6, plus, 264, PostIndex},
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al,
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{{al, r11, r3, minus, 2810, PostIndex},
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al,
"al r11 r3 minus 2810 PostIndex",
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{{al, r2, r10, minus, 669, PreIndex},
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al,
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{{al, r2, r13, minus, 3867, PreIndex},
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al,
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{{al, r8, r10, plus, 3610, PreIndex},
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al,
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{{al, r3, r2, minus, 969, PreIndex},
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al,
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{{al, r12, r4, plus, 1585, PreIndex},
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al,
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{{al, r9, r14, plus, 3256, PreIndex},
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al,
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{{al, r12, r2, plus, 844, PreIndex},
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al,
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{{al, r6, r14, plus, 3142, PreIndex},
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al,
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{{al, r4, r2, plus, 1999, PreIndex},
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al,
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"al_r4_r2_plus_1999_PreIndex"},
{{al, r5, r3, minus, 3170, PreIndex},
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al,
"al r5 r3 minus 3170 PreIndex",
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{{al, r7, r0, minus, 2703, PostIndex},
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al,
"al r7 r0 minus 2703 PostIndex",
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{{al, r10, r3, plus, 1445, PreIndex},
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al,
"al r10 r3 plus 1445 PreIndex",
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{{al, r12, r13, minus, 565, PreIndex},
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al,
"al r12 r13 minus 565 PreIndex",
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{{al, r3, r7, minus, 2665, PreIndex},
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al,
"al r3 r7 minus 2665 PreIndex",
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{{al, r13, r0, plus, 4, PreIndex},
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al,
"al r13 r0 plus 4 PreIndex",
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{{al, r5, r6, plus, 2703, PostIndex},
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"al r5 r6 plus 2703 PostIndex",
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{{al, r12, r13, minus, 2281, PreIndex},
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al,
"al r12 r13 minus 2281 PreIndex",
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{{al, r9, r12, minus, 3899, PostIndex},
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al,
"al r9 r12 minus 3899 PostIndex",
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{{al, r1, r3, plus, 871, PostIndex},
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al,
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{{al, r7, r3, plus, 3195, PostIndex},
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al,
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{{al, r5, r14, plus, 227, PostIndex},
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{{al, r1, r8, plus, 3566, PreIndex},
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{{al, r9, r10, plus, 2948, PreIndex},
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al,
"al r9 r10 plus 2948 PreIndex",
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{{al, r1, r10, plus, 582, PreIndex},
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"al r1 r10 plus 582 PreIndex",
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{{al, r6, r13, plus, 3472, PreIndex},
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{{al, r2, r7, minus, 1872, PostIndex},
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{{al, r12, r9, plus, 3425, PostIndex},
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"al r12 r9 plus 3425 PostIndex",
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{{al, r8, r7, minus, 3771, PreIndex},
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"al r8 r7 minus 3771 PreIndex",
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{{al, r9, r12, plus, 3548, PostIndex},
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"al r9 r12 plus 3548 PostIndex",
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{{al, r9, r3, minus, 270, PostIndex},
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al,
"al r9 r3 minus 270 PostIndex",
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{{al, r6, r4, plus, 1505, PreIndex},
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al,
"al r6 r4 plus 1505 PreIndex",
"al_r6_r4_plus_1505_PreIndex"},
{{al, r11, r3, minus, 4, PreIndex},
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al,
"al r11 r3 minus 4 PreIndex",
"al_r11_r3_minus_4_PreIndex"},
{{al, r8, r12, minus, 1428, PostIndex},
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al,
"al r8 r12 minus 1428 PostIndex",
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{{al, r1, r4, minus, 969, PostIndex},
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al,
"al r1 r4 minus 969 PostIndex",
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{{al, r10, r13, minus, 932, PostIndex},
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al,
"al r10 r13 minus 932 PostIndex",
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{{al, r9, r6, plus, 2012, PostIndex},
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al,
"al r9 r6 plus 2012 PostIndex",
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{{al, r10, r1, minus, 2453, PreIndex},
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al,
"al r10 r1 minus 2453 PreIndex",
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{{al, r4, r0, plus, 1999, PostIndex},
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al,
"al r4 r0 plus 1999 PostIndex",
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{{al, r3, r1, plus, 3522, PreIndex},
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al,
"al r3 r1 plus 3522 PreIndex",
"al_r3_r1_plus_3522_PreIndex"},
{{al, r8, r3, minus, 2523, PreIndex},
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al,
"al r8 r3 minus 2523 PreIndex",
"al_r8_r3_minus_2523_PreIndex"},
{{al, r7, r12, plus, 2775, PostIndex},
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al,
"al r7 r12 plus 2775 PostIndex",
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{{al, r14, r0, minus, 2590, PreIndex},
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al,
"al r14 r0 minus 2590 PreIndex",
"al_r14_r0_minus_2590_PreIndex"},
{{al, r3, r14, minus, 3472, PreIndex},
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al,
"al r3 r14 minus 3472 PreIndex",
"al_r3_r14_minus_3472_PreIndex"},
{{al, r14, r1, plus, 2462, PostIndex},
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"al r14 r1 plus 2462 PostIndex",
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{{al, r2, r5, plus, 1472, PreIndex},
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al,
"al r2 r5 plus 1472 PreIndex",
"al_r2_r5_plus_1472_PreIndex"},
{{al, r1, r3, minus, 1652, PreIndex},
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al,
"al r1 r3 minus 1652 PreIndex",
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{{al, r0, r1, plus, 1999, PostIndex},
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al,
"al r0 r1 plus 1999 PostIndex",
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{{al, r2, r0, minus, 3254, PreIndex},
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al,
"al r2 r0 minus 3254 PreIndex",
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{{al, r11, r8, plus, 3405, PreIndex},
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al,
"al r11 r8 plus 3405 PreIndex",
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{{al, r5, r14, plus, 2963, PostIndex},
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al,
"al r5 r14 plus 2963 PostIndex",
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{{al, r12, r14, minus, 2545, PreIndex},
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al,
"al r12 r14 minus 2545 PreIndex",
"al_r12_r14_minus_2545_PreIndex"},
{{al, r8, r14, plus, 1660, PostIndex},
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"al r8 r14 plus 1660 PostIndex",
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{{al, r13, r14, plus, 2403, PreIndex},
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al,
"al r13 r14 plus 2403 PreIndex",
"al_r13_r14_plus_2403_PreIndex"},
{{al, r3, r2, plus, 19, PreIndex},
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al,
"al r3 r2 plus 19 PreIndex",
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{{al, r8, r11, plus, 2821, PostIndex},
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al,
"al r8 r11 plus 2821 PostIndex",
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{{al, r8, r3, minus, 1999, PreIndex},
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al,
"al r8 r3 minus 1999 PreIndex",
"al_r8_r3_minus_1999_PreIndex"},
{{al, r2, r5, plus, 1991, PreIndex},
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al,
"al r2 r5 plus 1991 PreIndex",
"al_r2_r5_plus_1991_PreIndex"},
{{al, r13, r14, minus, 188, PreIndex},
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al,
"al r13 r14 minus 188 PreIndex",
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{{al, r4, r8, plus, 4095, PreIndex},
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al,
"al r4 r8 plus 4095 PreIndex",
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{{al, r11, r3, minus, 3057, PreIndex},
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al,
"al r11 r3 minus 3057 PreIndex",
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{{al, r6, r5, plus, 1699, PreIndex},
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al,
"al r6 r5 plus 1699 PreIndex",
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{{al, r14, r6, plus, 1537, PreIndex},
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al,
"al r14 r6 plus 1537 PreIndex",
"al_r14_r6_plus_1537_PreIndex"},
{{al, r5, r7, minus, 3625, PreIndex},
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al,
"al r5 r7 minus 3625 PreIndex",
"al_r5_r7_minus_3625_PreIndex"},
{{al, r7, r4, minus, 3142, PreIndex},
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al,
"al r7 r4 minus 3142 PreIndex",
"al_r7_r4_minus_3142_PreIndex"},
{{al, r14, r12, minus, 525, PreIndex},
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al,
"al r14 r12 minus 525 PreIndex",
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{{al, r8, r14, plus, 53, PreIndex},
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al,
"al r8 r14 plus 53 PreIndex",
"al_r8_r14_plus_53_PreIndex"},
{{al, r13, r1, plus, 3109, PreIndex},
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al,
"al r13 r1 plus 3109 PreIndex",
"al_r13_r1_plus_3109_PreIndex"},
{{al, r4, r1, minus, 2086, PreIndex},
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al,
"al r4 r1 minus 2086 PreIndex",
"al_r4_r1_minus_2086_PreIndex"},
{{al, r3, r13, plus, 3072, PreIndex},
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al,
"al r3 r13 plus 3072 PreIndex",
"al_r3_r13_plus_3072_PreIndex"},
{{al, r6, r14, plus, 2669, PreIndex},
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al,
"al r6 r14 plus 2669 PreIndex",
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{{al, r6, r12, plus, 1999, PostIndex},
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al,
"al r6 r12 plus 1999 PostIndex",
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{{al, r2, r7, plus, 1035, PostIndex},
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al,
"al r2 r7 plus 1035 PostIndex",
"al_r2_r7_plus_1035_PostIndex"},
{{al, r10, r14, minus, 2281, PreIndex},
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al,
"al r10 r14 minus 2281 PreIndex",
"al_r10_r14_minus_2281_PreIndex"},
{{al, r11, r10, plus, 1536, PostIndex},
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al,
"al r11 r10 plus 1536 PostIndex",
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{{al, r1, r11, plus, 2483, PreIndex},
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al,
"al r1 r11 plus 2483 PreIndex",
"al_r1_r11_plus_2483_PreIndex"},
{{al, r8, r5, minus, 2224, PostIndex},
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al,
"al r8 r5 minus 2224 PostIndex",
"al_r8_r5_minus_2224_PostIndex"},
{{al, r5, r13, minus, 4090, PreIndex},
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al,
"al r5 r13 minus 4090 PreIndex",
"al_r5_r13_minus_4090_PreIndex"},
{{al, r11, r6, minus, 1455, PostIndex},
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al,
"al r11 r6 minus 1455 PostIndex",
"al_r11_r6_minus_1455_PostIndex"},
{{al, r3, r6, plus, 2546, PreIndex},
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al,
"al r3 r6 plus 2546 PreIndex",
"al_r3_r6_plus_2546_PreIndex"},
{{al, r1, r5, minus, 53, PreIndex},
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al,
"al r1 r5 minus 53 PreIndex",
"al_r1_r5_minus_53_PreIndex"},
{{al, r1, r7, plus, 3450, PreIndex},
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al,
"al r1 r7 plus 3450 PreIndex",
"al_r1_r7_plus_3450_PreIndex"},
{{al, r1, r14, minus, 2047, PreIndex},
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al,
"al r1 r14 minus 2047 PreIndex",
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{{al, r4, r6, minus, 1759, PostIndex},
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al,
"al r4 r6 minus 1759 PostIndex",
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{{al, r7, r5, plus, 3662, PreIndex},
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al,
"al r7 r5 plus 3662 PreIndex",
"al_r7_r5_plus_3662_PreIndex"},
{{al, r6, r9, minus, 2290, PostIndex},
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al,
"al r6 r9 minus 2290 PostIndex",
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{{al, r7, r9, plus, 2208, PreIndex},
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al,
"al r7 r9 plus 2208 PreIndex",
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{{al, r6, r0, minus, 1601, PostIndex},
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al,
"al r6 r0 minus 1601 PostIndex",
"al_r6_r0_minus_1601_PostIndex"},
{{al, r4, r3, plus, 2202, PostIndex},
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al,
"al r4 r3 plus 2202 PostIndex",
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{{al, r12, r10, minus, 3688, PostIndex},
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al,
"al r12 r10 minus 3688 PostIndex",
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{{al, r11, r12, minus, 1455, PreIndex},
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al,
"al r11 r12 minus 1455 PreIndex",
"al_r11_r12_minus_1455_PreIndex"},
{{al, r1, r11, plus, 2929, PreIndex},
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al,
"al r1 r11 plus 2929 PreIndex",
"al_r1_r11_plus_2929_PreIndex"},
{{al, r5, r0, plus, 582, PostIndex},
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al,
"al r5 r0 plus 582 PostIndex",
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{{al, r4, r13, minus, 3603, PreIndex},
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al,
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{{al, r6, r12, minus, 3585, PreIndex},
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{{al, r12, r5, minus, 1168, PreIndex},
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{{al, r8, r10, minus, 282, PreIndex},
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{{al, r7, r10, minus, 2839, PreIndex},
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{{al, r9, r1, minus, 2523, PreIndex},
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{{al, r7, r13, plus, 2464, PreIndex},
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{{al, r0, r4, minus, 496, PostIndex},
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{{al, r4, r11, minus, 2119, PostIndex},
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{{al, r3, r2, minus, 794, PreIndex},
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{{al, r0, r12, plus, 1234, PostIndex},
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{{al, r9, r8, plus, 3529, PostIndex},
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{{al, r11, r9, minus, 2281, PreIndex},
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{{al, r11, r6, minus, 3564, PostIndex},
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{{al, r5, r4, plus, 22, PreIndex},
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{{al, r6, r8, plus, 2175, PreIndex},
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{{al, r8, r14, plus, 2453, PostIndex},
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{{al, r6, r9, minus, 2183, PostIndex},
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{{al, r12, r3, minus, 1750, PostIndex},
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{{al, r6, r12, plus, 998, PreIndex},
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{{al, r2, r11, minus, 1740, PreIndex},
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{{al, r12, r14, plus, 3138, PreIndex},
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{{al, r6, r5, plus, 3771, PreIndex},
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{{al, r1, r6, minus, 3663, PreIndex},
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{{al, r2, r9, minus, 2662, PostIndex},
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{{al, r14, r1, minus, 3076, PostIndex},
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"al r14 r1 minus 3076 PostIndex",
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{{al, r2, r9, plus, 1542, PostIndex},
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{{al, r14, r7, plus, 2016, PreIndex},
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"al r14 r7 plus 2016 PreIndex",
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{{al, r3, r5, minus, 1981, PreIndex},
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"al r7 r3 plus 2233 PostIndex",
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{{al, r8, r5, minus, 4095, PostIndex},
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{{al, r0, r8, minus, 662, PostIndex},
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{{al, r9, r5, minus, 4046, PostIndex},
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{{al, r10, r4, plus, 2245, PreIndex},
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{{al, r2, r1, plus, 2036, PostIndex},
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{{al, r0, r1, minus, 1159, PreIndex},
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{{al, r7, r9, minus, 3109, PostIndex},
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"al r7 r9 minus 3109 PostIndex",
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{{al, r10, r12, minus, 3094, PreIndex},
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"al r10 r12 minus 3094 PreIndex",
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{{al, r7, r6, plus, 1241, PreIndex},
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{{al, r13, r3, plus, 1824, PreIndex},
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"al r13 r3 plus 1824 PreIndex",
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{{al, r10, r12, minus, 1159, PreIndex},
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al,
"al r10 r12 minus 1159 PreIndex",
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{{al, r6, r10, minus, 2948, PreIndex},
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al,
"al r6 r10 minus 2948 PreIndex",
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{{al, r9, r6, plus, 496, PreIndex},
false,
al,
"al r9 r6 plus 496 PreIndex",
"al_r9_r6_plus_496_PreIndex"},
{{al, r10, r9, plus, 213, PreIndex},
false,
al,
"al r10 r9 plus 213 PreIndex",
"al_r10_r9_plus_213_PreIndex"},
{{al, r14, r1, minus, 2642, PreIndex},
false,
al,
"al r14 r1 minus 2642 PreIndex",
"al_r14_r1_minus_2642_PreIndex"},
{{al, r6, r12, plus, 3529, PostIndex},
false,
al,
"al r6 r12 plus 3529 PostIndex",
"al_r6_r12_plus_3529_PostIndex"},
{{al, r4, r9, minus, 3625, PreIndex},
false,
al,
"al r4 r9 minus 3625 PreIndex",
"al_r4_r9_minus_3625_PreIndex"},
{{al, r8, r0, minus, 2046, PreIndex},
false,
al,
"al r8 r0 minus 2046 PreIndex",
"al_r8_r0_minus_2046_PreIndex"},
{{al, r5, r4, minus, 365, PostIndex},
false,
al,
"al r5 r4 minus 365 PostIndex",
"al_r5_r4_minus_365_PostIndex"},
{{al, r11, r13, minus, 1389, PreIndex},
false,
al,
"al r11 r13 minus 1389 PreIndex",
"al_r11_r13_minus_1389_PreIndex"},
{{al, r1, r3, minus, 251, PostIndex},
false,
al,
"al r1 r3 minus 251 PostIndex",
"al_r1_r3_minus_251_PostIndex"},
{{al, r6, r0, plus, 2617, PreIndex},
false,
al,
"al r6 r0 plus 2617 PreIndex",
"al_r6_r0_plus_2617_PreIndex"}};
// These headers each contain an array of `TestResult` with the reference output
// values. The reference arrays are names `kReference{mnemonic}`.
#include "aarch32/traces/assembler-cond-rd-memop-immediate-8192-a32-ldr.h"
#include "aarch32/traces/assembler-cond-rd-memop-immediate-8192-a32-ldrb.h"
#include "aarch32/traces/assembler-cond-rd-memop-immediate-8192-a32-str.h"
#include "aarch32/traces/assembler-cond-rd-memop-immediate-8192-a32-strb.h"
// The maximum number of errors to report in detail for each test.
const unsigned kErrorReportLimit = 8;
typedef void (MacroAssembler::*Fn)(Condition cond,
Register rd,
const MemOperand& memop);
void TestHelper(Fn instruction,
const char* mnemonic,
const TestResult reference[]) {
unsigned total_error_count = 0;
MacroAssembler masm(BUF_SIZE);
masm.UseA32();
for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
// Values to pass to the macro-assembler.
Condition cond = kTests[i].operands.cond;
Register rd = kTests[i].operands.rd;
Register rn = kTests[i].operands.rn;
Sign sign = kTests[i].operands.sign;
int32_t offset = kTests[i].operands.offset;
AddrMode addr_mode = kTests[i].operands.addr_mode;
MemOperand memop(rn, sign, offset, addr_mode);
int32_t start = masm.GetCursorOffset();
{
// We never generate more that 4 bytes, as IT instructions are only
// allowed for narrow encodings.
ExactAssemblyScope scope(&masm, 4, ExactAssemblyScope::kMaximumSize);
if (kTests[i].in_it_block) {
masm.it(kTests[i].it_condition);
}
(masm.*instruction)(cond, rd, memop);
}
int32_t end = masm.GetCursorOffset();
const byte* result_ptr =
masm.GetBuffer()->GetOffsetAddress<const byte*>(start);
VIXL_ASSERT(start < end);
uint32_t result_size = end - start;
if (Test::generate_test_trace()) {
// Print the result bytes.
printf("const byte kInstruction_%s_%s[] = {\n",
mnemonic,
kTests[i].identifier);
for (uint32_t j = 0; j < result_size; j++) {
if (j == 0) {
printf(" 0x%02" PRIx8, result_ptr[j]);
} else {
printf(", 0x%02" PRIx8, result_ptr[j]);
}
}
// This comment is meant to be used by external tools to validate
// the encoding. We can parse the comment to figure out what
// instruction this corresponds to.
if (kTests[i].in_it_block) {
printf(" // It %s; %s %s\n};\n",
kTests[i].it_condition.GetName(),
mnemonic,
kTests[i].operands_description);
} else {
printf(" // %s %s\n};\n", mnemonic, kTests[i].operands_description);
}
} else {
// Check we've emitted the exact same encoding as present in the
// trace file. Only print up to `kErrorReportLimit` errors.
if (((result_size != reference[i].size) ||
(memcmp(result_ptr, reference[i].encoding, reference[i].size) !=
0)) &&
(++total_error_count <= kErrorReportLimit)) {
printf("Error when testing \"%s\" with operands \"%s\":\n",
mnemonic,
kTests[i].operands_description);
printf(" Expected: ");
for (uint32_t j = 0; j < reference[i].size; j++) {
if (j == 0) {
printf("0x%02" PRIx8, reference[i].encoding[j]);
} else {
printf(", 0x%02" PRIx8, reference[i].encoding[j]);
}
}
printf("\n");
printf(" Found: ");
for (uint32_t j = 0; j < result_size; j++) {
if (j == 0) {
printf("0x%02" PRIx8, result_ptr[j]);
} else {
printf(", 0x%02" PRIx8, result_ptr[j]);
}
}
printf("\n");
}
}
}
masm.FinalizeCode();
if (Test::generate_test_trace()) {
// Finalize the trace file by writing the final `TestResult` array
// which links all generated instruction encodings.
printf("const TestResult kReference%s[] = {\n", mnemonic);
for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
printf(" {\n");
printf(" ARRAY_SIZE(kInstruction_%s_%s),\n",
mnemonic,
kTests[i].identifier);
printf(" kInstruction_%s_%s,\n", mnemonic, kTests[i].identifier);
printf(" },\n");
}
printf("};\n");
} else {
if (total_error_count > kErrorReportLimit) {
printf("%u other errors follow.\n",
total_error_count - kErrorReportLimit);
}
// Crash if the test failed.
VIXL_CHECK(total_error_count == 0);
}
}
// Instantiate tests for each instruction in the list.
#define TEST(mnemonic) \
void Test_##mnemonic() { \
TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \
} \
Test test_##mnemonic( \
"AARCH32_ASSEMBLER_COND_RD_MEMOP_IMMEDIATE_8192_A32_" #mnemonic, \
&Test_##mnemonic);
FOREACH_INSTRUCTION(TEST)
#undef TEST
} // namespace
#endif
} // namespace aarch32
} // namespace vixl