// Copyright 2015, ARM Limited
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// * Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
// * Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
// * Neither the name of ARM Limited nor the names of its contributors may be
// used to endorse or promote products derived from this software without
// specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// ---------------------------------------------------------------------
// This file is auto generated using tools/generate_simulator_traces.py.
//
// PLEASE DO NOT EDIT.
// ---------------------------------------------------------------------
#ifndef VIXL_SIM_FMINNMP_D_TRACE_A64_H_
#define VIXL_SIM_FMINNMP_D_TRACE_A64_H_
const uint64_t kExpected_NEON_fminnmp_D[] = {
0x8000000000000001,
0x0000000000000000,
0x0010000000000000,
0x3fdfffffffffffff,
0x3fe0000000000000,
0x3fe0000000000001,
0x3fefffffffffffff,
0x3ff0000000000000,
0x3ff0000000000001,
0x3ff8000000000000,
0x4024000000000000,
0x7fefffffffffffff,
0x7ff0000000000000,
0x7ff923456789abcd,
0x7ff923456789abcd,
0x7ff923456789abcd,
0x000123456789abcd,
0x000123456789abcd,
0x0000000000000001,
0x8000000000000000,
0x8010000000000000,
0xbfdfffffffffffff,
0xbfe0000000000000,
0xbfe0000000000001,
0xbfefffffffffffff,
0xbff0000000000000,
0xbff0000000000001,
0xbff8000000000000,
0xc024000000000000,
0xffefffffffffffff,
0xfff0000000000000,
0xfff0000000000000,
0xfff923456789abcd,
0xfff923456789abcd,
0xfff923456789abcd,
0xfff0000000000000,
0x800fffffffffffff,
0x800fffffffffffff,
};
const unsigned kExpectedCount_NEON_fminnmp_D = 38;
#endif // VIXL_SIM_FMINNMP_D_TRACE_A64_H_