This README describes a sample invocation of disasm.py whose purpose is to test
the low level ARM/Thumb disassembly functionality from llvm using the llvm-mc
command line. We invoke gdb on an executable, try to disassemble a function,
and then read the memory contents of the disassembled function.
The byte contents are written into a file named disasm-input.txt and then we
invoke llvm-mc -disassemble plus options (set with the -o/--options) on the
byte contents.
See the following for a sample session using this command:
[16:26:57] johnny:/Volumes/data/Radar/9131529 $ /Volumes/data/lldb/svn/trunk/utils/test/disasm.py -C 'set shlib-path-substitutions /usr /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/usr /System /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/System /Library /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/Library' -O '-arch armv7' -m /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -e /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/usr/lib/libSystem.B.dylib -f printf --options='-triple=thumb-apple-darwin -debug-only=arm-disassembler'
gdb commands: ['set shlib-path-substitutions /usr /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/usr /System /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/System /Library /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/Library']
gdb options: -arch armv7
executable: /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/usr/lib/libSystem.B.dylib
function: printf
llvm-mc: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc
llvm-mc options: -triple=thumb-apple-darwin -debug-only=arm-disassembler
GNU gdb 6.3.50-20050815 (Apple version gdb-1518) (Sat Feb 12 02:56:02 UTC 2011)
Copyright 2004 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB. Type "show warranty" for details.
This GDB was configured as "--host=x86_64-apple-darwin --target=arm-apple-darwin".
<Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/Library
<eloper/SDKs/iPhoneOS4.3.sdk/usr/lib/libSystem.B.dylib
Reading symbols for shared libraries ................ done
Reading symbols from /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/usr/lib/libSystem.B.dylib...done.
(gdb) disassemble printf
Dump of assembler code for function printf:
0x0704cdd0 <printf+0>: push {r0, r1, r2, r3}
0x0704cdd2 <printf+2>: push {r4, r5, r7, lr}
0x0704cdd4 <printf+4>: add r7, sp, #8
0x0704cdd6 <printf+6>: sub sp, #4
0x0704cdd8 <printf+8>: add r3, sp, #20
0x0704cdda <printf+10>: ldr.w r5, [r3], #4
0x0704cdde <printf+14>: str r3, [sp, #0]
0x0704cde0 <printf+16>: ldr r3, [pc, #52] (0x704ce18 <printf+72>)
0x0704cde2 <printf+18>: add r3, pc
0x0704cde4 <printf+20>: ldr r0, [r3, #0]
0x0704cde6 <printf+22>: ldr r4, [r0, #0]
0x0704cde8 <printf+24>: ldr r0, [pc, #48] (0x704ce1c <printf+76>)
0x0704cdea <printf+26>: add r0, pc
0x0704cdec <printf+28>: ldr r0, [r0, #0]
0x0704cdee <printf+30>: ldr r0, [r0, #0]
0x0704cdf0 <printf+32>: blx 0x707ba30 <pthread_getspecific>
0x0704cdf4 <printf+36>: cbnz r0, 0x704cdfe <printf+46>
0x0704cdf6 <printf+38>: ldr r1, [pc, #40] (0x704ce20 <printf+80>)
0x0704cdf8 <printf+40>: add r1, pc
0x0704cdfa <printf+42>: ldr r1, [r1, #0]
0x0704cdfc <printf+44>: b.n 0x704ce00 <printf+48>
0x0704cdfe <printf+46>: mov r1, r0
0x0704ce00 <printf+48>: mov r0, r4
0x0704ce02 <printf+50>: mov r2, r5
0x0704ce04 <printf+52>: ldr r3, [sp, #0]
0x0704ce06 <printf+54>: bl 0x704ad44 <vfprintf_l>
0x0704ce0a <printf+58>: sub.w sp, r7, #8 ; 0x8
0x0704ce0e <printf+62>: ldmia.w sp!, {r4, r5, r7, lr}
0x0704ce12 <printf+66>: add sp, #16
0x0704ce14 <printf+68>: bx lr
0x0704ce16 <printf+70>: nop
0x0704ce18 <printf+72>: movs r3, #142
0x0704ce1a <printf+74>: lsls r5, r0, #0
0x0704ce1c <printf+76>: adds r1, #122
0x0704ce1e <printf+78>: lsls r5, r0, #0
0x0704ce20 <printf+80>: adds r1, #104
0x0704ce22 <printf+82>: lsls r5, r0, #0
End of assembler dump.
(gdb) x /2b 0x0704cdd0
0x704cdd0 <printf>: 0x0f 0xb4
(gdb) x /2b 0x0704cdd2
0x704cdd2 <printf+2>: 0xb0 0xb5
(gdb) x /2b 0x0704cdd4
0x704cdd4 <printf+4>: 0x02 0xaf
(gdb) x /2b 0x0704cdd6
0x704cdd6 <printf+6>: 0x81 0xb0
(gdb) x /2b 0x0704cdd8
0x704cdd8 <printf+8>: 0x05 0xab
(gdb) x /4b 0x0704cdda
0x704cdda <printf+10>: 0x53 0xf8 0x04 0x5b
(gdb) x /2b 0x0704cdde
0x704cdde <printf+14>: 0x00 0x93
(gdb) x /2b 0x0704cde0
0x704cde0 <printf+16>: 0x0d 0x4b
(gdb) x /2b 0x0704cde2
0x704cde2 <printf+18>: 0x7b 0x44
(gdb) x /2b 0x0704cde4
0x704cde4 <printf+20>: 0x18 0x68
(gdb) x /2b 0x0704cde6
0x704cde6 <printf+22>: 0x04 0x68
(gdb) x /2b 0x0704cde8
0x704cde8 <printf+24>: 0x0c 0x48
(gdb) x /2b 0x0704cdea
0x704cdea <printf+26>: 0x78 0x44
(gdb) x /2b 0x0704cdec
0x704cdec <printf+28>: 0x00 0x68
(gdb) x /2b 0x0704cdee
0x704cdee <printf+30>: 0x00 0x68
(gdb) x /4b 0x0704cdf0
0x704cdf0 <printf+32>: 0x2e 0xf0 0x1e 0xee
(gdb) x /2b 0x0704cdf4
0x704cdf4 <printf+36>: 0x18 0xb9
(gdb) x /2b 0x0704cdf6
0x704cdf6 <printf+38>: 0x0a 0x49
(gdb) x /2b 0x0704cdf8
0x704cdf8 <printf+40>: 0x79 0x44
(gdb) x /2b 0x0704cdfa
0x704cdfa <printf+42>: 0x09 0x68
(gdb) x /2b 0x0704cdfc
0x704cdfc <printf+44>: 0x00 0xe0
(gdb) x /2b 0x0704cdfe
0x704cdfe <printf+46>: 0x01 0x46
(gdb) x /2b 0x0704ce00
0x704ce00 <printf+48>: 0x20 0x46
(gdb) x /2b 0x0704ce02
0x704ce02 <printf+50>: 0x2a 0x46
(gdb) x /2b 0x0704ce04
0x704ce04 <printf+52>: 0x00 0x9b
(gdb) x /4b 0x0704ce06
0x704ce06 <printf+54>: 0xfd 0xf7 0x9d 0xff
(gdb) x /4b 0x0704ce0a
0x704ce0a <printf+58>: 0xa7 0xf1 0x08 0x0d
(gdb) x /4b 0x0704ce0e
0x704ce0e <printf+62>: 0xbd 0xe8 0xb0 0x40
(gdb) x /2b 0x0704ce12
0x704ce12 <printf+66>: 0x04 0xb0
(gdb) x /2b 0x0704ce14
0x704ce14 <printf+68>: 0x70 0x47
(gdb) x /2b 0x0704ce16
0x704ce16 <printf+70>: 0x00 0xbf
(gdb) x /2b 0x0704ce18
0x704ce18 <printf+72>: 0x8e 0x23
(gdb) x /2b 0x0704ce1a
0x704ce1a <printf+74>: 0x05 0x00
(gdb) x /2b 0x0704ce1c
0x704ce1c <printf+76>: 0x7a 0x31
(gdb) x /2b 0x0704ce1e
0x704ce1e <printf+78>: 0x05 0x00
(gdb) x /2b 0x0704ce20
0x704ce20 <printf+80>: 0x68 0x31
(gdb) x /2b 0x0704ce22
0x704ce22 <printf+82>: 0x05 0x00
(gdb) quit
Executing command: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -disassemble -triple=thumb-apple-darwin -debug-only=arm-disassembler disasm-input.txt
Opcode=2305 Name=tPUSH Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 1: 1: 1: 1|
-------------------------------------------------------------------------------------------------
push {r0, r1, r2, r3}
Opcode=2305 Name=tPUSH Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 1: 0: 1| 1: 0: 1: 1| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
push {r4, r5, r7, lr}
Opcode=2228 Name=tADDrSPi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 0| 1: 1: 1: 1| 0: 0: 0: 0| 0: 0: 1: 0|
-------------------------------------------------------------------------------------------------
add r7, sp, #8
Opcode=2328 Name=tSUBspi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 0| 0: 0: 0: 1|
-------------------------------------------------------------------------------------------------
sub sp, #4
Opcode=2228 Name=tADDrSPi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 1: 0: 1|
-------------------------------------------------------------------------------------------------
add r3, sp, #20
Opcode=1963 Name=t2LDR_POST Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 1: 0: 0: 0| 0: 1: 0: 1| 0: 0: 1: 1| 0: 1: 0: 1| 1: 0: 1: 1| 0: 0: 0: 0| 0: 1: 0: 0|
-------------------------------------------------------------------------------------------------
ldr r5, [r3], #4
Opcode=2324 Name=tSTRspi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
str r3, [sp]
Opcode=2275 Name=tLDRpci Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 1: 0: 1: 1| 0: 0: 0: 0| 1: 1: 0: 1|
-------------------------------------------------------------------------------------------------
ldr.n r3, #52
Opcode=2223 Name=tADDhirr Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 0: 1: 1|
-------------------------------------------------------------------------------------------------
add r3, pc
Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 1| 1: 0: 0: 0|
-------------------------------------------------------------------------------------------------
ldr r0, [r3]
Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0|
-------------------------------------------------------------------------------------------------
ldr r4, [r0]
Opcode=2275 Name=tLDRpci Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 1: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0|
-------------------------------------------------------------------------------------------------
ldr.n r0, #48
Opcode=2223 Name=tADDhirr Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 0: 0: 0|
-------------------------------------------------------------------------------------------------
add r0, pc
Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
ldr r0, [r0]
Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
ldr r0, [r0]
Opcode=2243 Name=tBLXi_r9 Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 0: 0: 0| 0: 0: 1: 0| 1: 1: 1: 0| 1: 1: 1: 0| 1: 1: 1: 0| 0: 0: 0: 1| 1: 1: 1: 0|
-------------------------------------------------------------------------------------------------
blx #191548
Opcode=2255 Name=tCBNZ Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 0: 0: 1| 0: 0: 0: 1| 1: 0: 0: 0|
-------------------------------------------------------------------------------------------------
cbnz r0, #6
Opcode=2275 Name=tLDRpci Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 1: 0: 0: 1| 0: 0: 0: 0| 1: 0: 1: 0|
-------------------------------------------------------------------------------------------------
ldr.n r1, #40
Opcode=2223 Name=tADDhirr Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 0: 0: 1|
-------------------------------------------------------------------------------------------------
add r1, pc
Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 1|
-------------------------------------------------------------------------------------------------
ldr r1, [r1]
Opcode=2238 Name=tB Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
b #0
Opcode=2294 Name=tMOVr Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 1: 0| 0: 0: 0: 0| 0: 0: 0: 1|
-------------------------------------------------------------------------------------------------
mov r1, r0
Opcode=2294 Name=tMOVr Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 1: 0| 0: 0: 1: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
mov r0, r4
Opcode=2294 Name=tMOVr Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 1: 0| 0: 0: 1: 0| 1: 0: 1: 0|
-------------------------------------------------------------------------------------------------
mov r2, r5
Opcode=2278 Name=tLDRspi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
ldr r3, [sp]
Opcode=2246 Name=tBLr9 Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 1: 1| 1: 1: 1: 1| 1: 1: 0: 1| 1: 1: 1: 1| 1: 1: 1: 1| 1: 0: 0: 1| 1: 1: 0: 1|
-------------------------------------------------------------------------------------------------
bl #-8390
Opcode=2153 Name=t2SUBri Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 0: 0: 1| 1: 0: 1: 0| 0: 1: 1: 1| 0: 0: 0: 0| 1: 1: 0: 1| 0: 0: 0: 0| 1: 0: 0: 0|
-------------------------------------------------------------------------------------------------
sub.w sp, r7, #8
Opcode=1926 Name=t2LDMIA_UPD Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 0| 1: 0: 0: 0| 1: 0: 1: 1| 1: 1: 0: 1| 0: 1: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
pop.w {r4, r5, r7, lr}
Opcode=2230 Name=tADDspi Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0|
-------------------------------------------------------------------------------------------------
add sp, #16
Opcode=2250 Name=tBX_RET Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 1: 1| 0: 1: 1: 1| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
bx lr
Opcode=2300 Name=tNOP Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
nop
Opcode=2293 Name=tMOVi8 Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 1: 1| 1: 0: 0: 0| 1: 1: 1: 0|
-------------------------------------------------------------------------------------------------
movs r3, #142
Opcode=2290 Name=tMOVSr Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 1|
-------------------------------------------------------------------------------------------------
movs r5, r0
Opcode=2225 Name=tADDi8 Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 1| 0: 1: 1: 1| 1: 0: 1: 0|
-------------------------------------------------------------------------------------------------
adds r1, #122
Opcode=2290 Name=tMOVSr Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 1|
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movs r5, r0
Opcode=2225 Name=tADDi8 Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 1| 0: 1: 1: 0| 1: 0: 0: 0|
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adds r1, #104
Opcode=2290 Name=tMOVSr Format=ARM_FORMAT_THUMBFRM(25)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 1|
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movs r5, r0
[16:28:00] johnny:/Volumes/data/Radar/9131529 $