#FW_VERSION=ALMSL F 10.01.16
#DEVICE_MANUFACTURER=NXP
#DEVICE_MODEL=N
## This file is used by NFC NXP NCI HAL(external/libnfc-nci/halimpl/pn54x)
## and NFC Service Java Native Interface Extensions (packages/apps/Nfc/nci/jni/extns/pn54x)
###############################################################################
# File location for Firmware
#FW_STORAGE="/vendor/firmware/libpn548ad_fw.so"
###############################################################################
# Chip type
# PN547C2 - 0x01
# PN65T - 0x02
# PN548C2 - 0x03
# PN66T - 0x04
NXP_NFC_CHIP=0x03
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
#
NXPLOG_EXTNS_LOGLEVEL=0x01
NXPLOG_NCIHAL_LOGLEVEL=0x01
NXPLOG_NCIX_LOGLEVEL=0x01
NXPLOG_NCIR_LOGLEVEL=0x01
NXPLOG_FWDNLD_LOGLEVEL=0x01
NXPLOG_TML_LOGLEVEL=0x01
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/pn54x"
###############################################################################
# System clock source selection configuration
# CLK_SRC_XTAL - 0x01
# CLK_SRC_PLL - 0x02
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration for PLL
# CLK_FREQ_13MHZ - 0x01
# CLK_FREQ_19_2MHZ - 0x02
# CLK_FREQ_24MHZ - 0x03
# CLK_FREQ_26MHZ - 0x04
# CLK_FREQ_38_4MHZ - 0x05
# CLK_FREQ_52MHZ - 0x06
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 (1.33 ms) to max = 0x06 (2.98 ms)
NXP_SYS_CLOCK_TO_CFG=0x01
###############################################################################
# I2C fragmentation
# Disabled - 0x00
# Enabled - 0x01
NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Timeout in secs to get NFCEE Discover notification
NXP_DEFAULT_NFCEE_TIMEOUT=0x06
###############################################################################
# Enable SWP full power mode when phone is power off
NXP_SWP_FULL_PWR_ON=0x00
###############################################################################
# Default SE Options
# No secure element - 0x00
# eSE - 0x01
# UICC - 0x02
# Multi SE - 0x03
NXP_DEFAULT_SE=0x02
###############################################################################
# Set the default AID route Location :
# This settings will be used when application does not set this parameter
# Host - 0x00
# eSE - 0x01
# UICC - 0x02
DEFAULT_AID_ROUTE=0x02
###############################################################################
# Set the Mifare Desfire route Location :
# This settings will be used when application does not set this parameter
# Host - 0x00
# eSE - 0x01
# UICC - 0x02
DEFAULT_DESFIRE_ROUTE=0x02
###############################################################################
# Set the Mifare CLT route Location :
# This settings will be used when application does not set this parameter
# Host - 0x00
# eSE - 0x01
# UICC - 0x02
DEFAULT_MIFARE_CLT_ROUTE=0x02
###############################################################################
# AID Matching platform options (for Lollipop)
# Supporting Prefix and Full match for both Host and Off-Host - 0x01
# Supporting Prefix match for Off-Host and Full match for Host - 0x02
AID_MATCHING_PLATFORM=0x01
###############################################################################
# Vzw Feature enable
# Disabled - 0x00
# Enabled - 0x01
VZW_FEATURE_ENABLE=0x01
###############################################################################
# Off-Host Payment CE when Screen is off or locked
# Disabled - 0x00
# Enabled - 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
# SWP Reader feature
# Timeout in seconds
NXP_SWP_RD_START_TIMEOUT=0x0A
NXP_SWP_RD_TAG_OP_TIMEOUT=0x01
###############################################################################
# Extension for Mifare reader enable
# Disabled - 0x00
# Enabled - 0x01
MIFARE_READER_ENABLE=0x01
###############################################################################
# SWP Switch timeout in milliseconds
# Allowed range is 0x00 to 0x3C (0 to 60 ms)
# No Timeout - 0x00
# 10 ms Timeout - 0x0A
NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# CHINA_TIANJIN_RF_SETTING
# Disabled - 0x00
# Enabled - 0x01
NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure the external TVDD
# Three configurations (0x01, 0x02 and 0x03) are supported
# Only one shall be selected (hardware dependancy)
# Config 1: VUP connected to VBAT
# Config 2: VUP connected to external 5V
# Config 3: TVDD connected to external 5V
NXP_EXT_TVDD_CFG=0x02
NXP_EXT_TVDD_CFG_1={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 02, 09, 00}
NXP_EXT_TVDD_CFG_2={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 56, 64, 01}
NXP_EXT_TVDD_CFG_3={20, 02, 0B, 02, A0, 66, 01, 01, A0, 0E, 03, 52, 64, 0A}
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NFC forum profile settings
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
# NFCC Configuration Control
# Don't allow NFCC to manage RF Config 0x00
# Allow NFCC to manage RF Config 0x01
NXP_NFC_MERGE_RF_PARAMS={20, 02, 04, 01, 85, 01, 01}
###############################################################################
# Standby enable settings
# Disabled - 0x00
# Enabled - 0x01
NXP_CORE_STANDBY={2F, 00, 01, 01}
###############################################################################
# Mifare Classic Key settings
#NXP_CORE_MFCKEY_SETTING={20, 02, 25,04, A0, 51, 06, A0, A1, A2, A3, A4, A5,
# A0, 52, 06, D3, F7, D3, F7, D3, F7,
# A0, 53, 06, FF, FF, FF, FF, FF, FF,
# A0, 54, 06, 00, 00, 00, 00, 00, 00}
###############################################################################
# Core configuration RF Field notification filter
# Disabled - 0x00
# Enabled - 0x01
NXP_CORE_RF_FIELD={20, 02, 05, 01, A0, 62, 01, 01}
###############################################################################
# NXP RF ALMSL configuration settings for FW VERSION = 10.01.16
#
# A0, 0D, 03, 00, 47, 02 RF_CLIF_CFG_BOOT CLIF_ANA_AGC_REG
# A0, 0D, 03, 00, 40, 01 RF_CLIF_CFG_BOOT CLIF_ANA_NFCLD_REG
# A0, 0D, 06, 00, FF, 05, 04, 06, 00 RF_CLIF_CFG_BOOT SMU_PMU_REG (0x40024010)
# A0, 0D, 03, 04, 43, 20 RF_CLIF_CFG_INITIATOR CLIF_ANA_PBF_CONTROL_REG
# A0, 0D, 06, 04, 35, F4, 01, F4, 01 RF_CLIF_CFG_INITIATOR CLIF_AGC_INPUT_REG
# A0, 0D, 06, 04, FF, 05, 00, 00, 00 RF_CLIF_CFG_INITIATOR SMU_PMU_REG (0x40024010)
# A0, 0D, 06, 06, 44, A3, 90, 03, 00 RF_CLIF_CFG_TARGET CLIF_ANA_RX_REG
# A0, 0D, 06, 06, 34, F7, 7F, 00, 10 RF_CLIF_CFG_TARGET CLIF_AGC_CONFIG1_REG
# A0, 0D, 06, 06, 33, 07, 40, 00, 00 RF_CLIF_CFG_TARGET CLIF_AGC_CONFIG0_REG
# A0, 0D, 06, 06, 30, C8, 00, 64, 00 RF_CLIF_CFG_TARGET CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 06, 2F, AF, 05, 80, 17 RF_CLIF_CFG_TARGET CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 06, 03, 00, 6D, 00, 20 RF_CLIF_CFG_TARGET CLIF_TRANSCEIVE_CONTROL_REG
# A0, 0D, 03, 06, 43, 20 RF_CLIF_CFG_TARGET CLIF_ANA_PBF_CONTROL_REG
# A0, 0D, 06, 06, 42, 00, 02, FF, FF RF_CLIF_CFG_TARGET CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 06, 41, 40 RF_CLIF_CFG_TARGET CLIF_ANA_TX_CLK_CONTROL_REG
# A0, 0D, 03, 06, 37, 08 RF_CLIF_CFG_TARGET CLIF_TX_CONTROL_REG
# A0, 0D, 03, 06, 16, 00 RF_CLIF_CFG_TARGET CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 06, 15, 00 RF_CLIF_CFG_TARGET CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 06, 35, 00, 02, 00, 02 RF_CLIF_CFG_TARGET CLIF_AGC_INPUT_REG
# A0, 0D, 03, 06, 3F, 04 RF_CLIF_CFG_TARGET CLIF_TEST_CONTROL_REG
# A0, 0D, 03, 06, 80, 03 RF_CLIF_CFG_TARGET CLIF_SPARE_REG
# A0, 0D, 06, 06, FF, 05, 00, 00, 00 RF_CLIF_CFG_TARGET SMU_PMU_REG (0x40024010)
# A0, 0D, 03, 07, 3F, 00 RF_CLIF_CFG_TARGET CLIF_TEST_CONTROL_REG
# A0, 0D, 06, 18, 34, 00, 00, E1, 03 RF_CLIF_CFG_TECHNO_I_RXB CLIF_AGC_CONFIG1_REG
# A0, 0D, 06, 18, 33, 0F, 83, 00, 00 RF_CLIF_CFG_TECHNO_I_RXB CLIF_AGC_CONFIG0_REG
# A0, 0D, 06, 1C, 34, 00, 00, E1, 03 RF_CLIF_CFG_TECHNO_I_RXF_P CLIF_AGC_CONFIG1_REG
# A0, 0D, 06, 1C, 33, 0F, 83, 00, 00 RF_CLIF_CFG_TECHNO_I_RXF_P CLIF_AGC_CONFIG0_REG
# A0, 0D, 06, 20, 4A, 00, 00, 00, 00 RF_CLIF_CFG_TECHNO_I_TX15693CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 20, 42, 88, 10, FF, FF RF_CLIF_CFG_TECHNO_I_TX15693CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 20, 16, 00 RF_CLIF_CFG_TECHNO_I_TX15693CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 20, 15, 00 RF_CLIF_CFG_TECHNO_I_TX15693CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 04, 22, 44, 22, 00 RF_CLIF_CFG_TECHNO_I_RX15693CLIF_ANA_RX_REG
# A0, 0D, 06, 22, 2D, 50, 44, 0C, 00 RF_CLIF_CFG_TECHNO_I_RX15693CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 04, 32, 03, 40, 3D RF_CLIF_CFG_BR_106_I_TXA CLIF_TRANSCEIVE_CONTROL_REG
# A0, 0D, 06, 32, 42, F8, 10, FF, FF RF_CLIF_CFG_BR_106_I_TXA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 32, 16, 00 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 32, 15, 01 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 03, 32, 0D, 22 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_DATA_MOD_REG
# A0, 0D, 03, 32, 14, 22 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_SYMBOL23_MOD_REG
# A0, 0D, 06, 32, 4A, 33, 07, 00, 08 RF_CLIF_CFG_BR_106_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 34, 2D, 24, 47, 0C, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 34, 34, 00, 00, EC, 03 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_AGC_CONFIG1_REG
# A0, 0D, 06, 34, 33, 0F, 01, 01, 70 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_AGC_CONFIG0_REG
# A0, 0D, 04, 34, 44, 21, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_ANA_RX_REG
# A0, 0D, 06, 38, 4A, 33, 07, 00, 08 RF_CLIF_CFG_BR_212_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 38, 42, 68, 10, FF, FF RF_CLIF_CFG_BR_212_I_TXA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 38, 16, 00 RF_CLIF_CFG_BR_212_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 38, 15, 00 RF_CLIF_CFG_BR_212_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 04, 3A, 44, 26, 00 RF_CLIF_CFG_BR_212_I_RXA CLIF_ANA_RX_REG
# A0, 0D, 06, 3A, 2D, 15, 47, 0D, 00 RF_CLIF_CFG_BR_212_I_RXA CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 3A, 34, 00, 00, E1, 03 RF_CLIF_CFG_BR_212_I_RXA CLIF_AGC_CONFIG1_REG
# A0, 0D, 06, 3A, 33, 0B, 83, 00, 00 RF_CLIF_CFG_BR_212_I_RXA CLIF_AGC_CONFIG0_REG
# A0, 0D, 06, 3C, 4A, 52, 07, 00, 1B RF_CLIF_CFG_BR_424_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 3C, 42, 68, 10, FF, FF RF_CLIF_CFG_BR_424_I_TXA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 3C, 16, 00 RF_CLIF_CFG_BR_424_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 3C, 15, 00 RF_CLIF_CFG_BR_424_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 04, 3E, 44, 26, 00 RF_CLIF_CFG_BR_424_I_RXA CLIF_ANA_RX_REG
# A0, 0D, 06, 3E, 2D, 15, 47, 0D, 00 RF_CLIF_CFG_BR_424_I_RXA CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 3E, 34, 00, 00, E1, 03 RF_CLIF_CFG_BR_424_I_RXA CLIF_AGC_CONFIG1_REG
# A0, 0D, 06, 3E, 33, 0B, 83, 00, 00 RF_CLIF_CFG_BR_424_I_RXA CLIF_AGC_CONFIG0_REG
# A0, 0D, 06, 40, 42, F0, 10, FF, FF RF_CLIF_CFG_BR_848_I_TXA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 40, 0D, 02 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_DATA_MOD_REG
# A0, 0D, 03, 40, 14, 02 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_SYMBOL23_MOD_REG
# A0, 0D, 06, 40, 4A, 12, 07, 00, 00 RF_CLIF_CFG_BR_848_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 40, 16, 00 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 40, 15, 00 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 04, 42, 44, 26, 00 RF_CLIF_CFG_BR_848_I_RXA CLIF_ANA_RX_REG
# A0, 0D, 06, 42, 2D, 15, 47, 0D, 00 RF_CLIF_CFG_BR_848_I_RXA CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 42, 34, 00, 00, E1, 03 RF_CLIF_CFG_BR_848_I_RXA CLIF_AGC_CONFIG1_REG
# A0, 0D, 06, 42, 33, 0B, 83, 00, 00 RF_CLIF_CFG_BR_848_I_RXA CLIF_AGC_CONFIG0_REG
# A0, 0D, 04, 46, 44, 26, 00 RF_CLIF_CFG_BR_106_I_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 46, 2D, 15, 25, 0D, 00 RF_CLIF_CFG_BR_106_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 44, 4A, 21, 07, 00, 07 RF_CLIF_CFG_BR_106_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 44, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_106_I_TXB CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 44, 16, 00 RF_CLIF_CFG_BR_106_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 44, 15, 00 RF_CLIF_CFG_BR_106_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 04, 4A, 44, 21, 00 RF_CLIF_CFG_BR_212_I_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 4A, 2D, 15, 9D, 0D, 00 RF_CLIF_CFG_BR_212_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 48, 4A, 21, 07, 00, 07 RF_CLIF_CFG_BR_212_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 48, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_212_I_TXB CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 48, 16, 00 RF_CLIF_CFG_BR_212_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 48, 15, 00 RF_CLIF_CFG_BR_212_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 04, 4E, 44, 26, 00 RF_CLIF_CFG_BR_424_I_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 4E, 2D, 15, 25, 0D, 00 RF_CLIF_CFG_BR_424_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 4C, 4A, 21, 07, 00, 07 RF_CLIF_CFG_BR_424_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 4C, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_424_I_TXB CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 4C, 16, 00 RF_CLIF_CFG_BR_424_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 4C, 15, 00 RF_CLIF_CFG_BR_424_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 04, 52, 44, 26, 00 RF_CLIF_CFG_BR_848_I_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 52, 2D, 15, 25, 0D, 00 RF_CLIF_CFG_BR_848_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 50, 42, 90, 10, FF, FF RF_CLIF_CFG_BR_848_I_TXB CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 50, 4A, 21, 07, 00, 07 RF_CLIF_CFG_BR_848_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 50, 16, 00 RF_CLIF_CFG_BR_848_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 50, 15, 00 RF_CLIF_CFG_BR_848_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 56, 2D, 05, 9E, 0C, 00 RF_CLIF_CFG_BR_212_I_RXF_P CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 04, 56, 44, 22, 00 RF_CLIF_CFG_BR_212_I_RXF_P CLIF_ANA_RX_REG
# A0, 0D, 06, 5C, 2D, 05, 9E, 0C, 00 RF_CLIF_CFG_BR_424_I_RXF_P CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 04, 5C, 44, 26, 00 RF_CLIF_CFG_BR_424_I_RXF_P CLIF_ANA_RX_REG
# A0, 0D, 06, 54, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_212_I_TXF CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 54, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_212_I_TXF CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 54, 16, 00 RF_CLIF_CFG_BR_212_I_TXF CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 54, 15, 00 RF_CLIF_CFG_BR_212_I_TXF CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 5A, 42, 90, 10, FF, FF RF_CLIF_CFG_BR_424_I_TXF CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 5A, 4A, 31, 07, 01, 07 RF_CLIF_CFG_BR_424_I_TXF CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 5A, 16, 00 RF_CLIF_CFG_BR_424_I_TXF CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 5A, 15, 00 RF_CLIF_CFG_BR_424_I_TXF CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 98, 2F, CF, 05, 80, 17 RF_CLIF_CFG_GTM_B CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 98, 42, 00, 02, FF, FF RF_CLIF_CFG_GTM_B CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 9A, 42, 00, 02, FF, FF RF_CLIF_CFG_GTM_FELICA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 30, 44, 12, 90, 03, 00 RF_CLIF_CFG_TECHNO_T_RXF CLIF_ANA_RX_REG
# A0, 0D, 06, 6C, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_106_T_RXA CLIF_ANA_RX_REG
# A0, 0D, 06, 6C, 30, CF, 00, 08, 00 RF_CLIF_CFG_BR_106_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 6C, 2F, 8F, 05, 80, 0C RF_CLIF_CFG_BR_106_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 70, 2F, 8F, 05, 80, 12 RF_CLIF_CFG_BR_212_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 70, 30, CF, 00, 08, 00 RF_CLIF_CFG_BR_212_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 03, 70, 2E, 40 RF_CLIF_CFG_BR_212_T_RXA CLIF_SIGPRO_CM_CONFIG_REG
# A0, 0D, 03, 70, 45, 30 RF_CLIF_CFG_BR_212_T_RXA CLIF_ANA_CM_CONFIG_REG
# A0, 0D, 06, 70, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_212_T_RXA CLIF_ANA_RX_REG
# A0, 0D, 06, 74, 2F, 6F, 05, 80, 12 RF_CLIF_CFG_BR_424_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 74, 30, D5, 00, 40, 00 RF_CLIF_CFG_BR_424_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 74, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_424_T_RXA CLIF_ANA_RX_REG
# A0, 0D, 06, 78, 2F, 3F, 07, 80, C1 RF_CLIF_CFG_BR_848_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 78, 30, 50, 00, 10, 00 RF_CLIF_CFG_BR_848_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 78, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_848_T_RXA CLIF_ANA_RX_REG
# A0, 0D, 06, 7C, 2F, CF, 05, 80, 17 RF_CLIF_CFG_BR_106_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 7C, 30, C8, 00, 64, 00 RF_CLIF_CFG_BR_106_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 7C, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_106_T_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 80, 2F, CF, 05, 80, 17 RF_CLIF_CFG_BR_212_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 80, 30, C8, 00, 64, 00 RF_CLIF_CFG_BR_212_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 80, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_212_T_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 84, 2F, CF, 05, 80, 17 RF_CLIF_CFG_BR_424_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 84, 30, C8, 00, 64, 00 RF_CLIF_CFG_BR_424_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 84, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_424_T_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 88, 2F, B1, 05, 80, 17 RF_CLIF_CFG_BR_848_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 88, 30, A8, 00, 64, 00 RF_CLIF_CFG_BR_848_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 88, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_848_T_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 8E, 44, 12, 90, 03, 00 RF_CLIF_CFG_BR_212_T_RXF CLIF_ANA_RX_REG
# A0, 0D, 06, 94, 44, 12, 90, 03, 00 RF_CLIF_CFG_BR_424_T_RXF CLIF_ANA_RX_REG
# A0, 0D, 03, 10, 43, 20 RF_CLIF_CFG_T_ACTIVE CLIF_ANA_PBF_CONTROL_REG
# A0, 0D, 06, 6A, 42, F8, 10, FF, FF RF_CLIF_CFG_BR_106_T_TXA_A CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 6A, 16, 00 RF_CLIF_CFG_BR_106_T_TXA_A CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 6A, 15, 01 RF_CLIF_CFG_BR_106_T_TXA_A CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 6A, 4A, 30, 0F, 01, 1F RF_CLIF_CFG_BR_106_T_TXA_A CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 8C, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_212_T_TXF_A CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 8C, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_212_T_TXF_A CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 8C, 16, 00 RF_CLIF_CFG_BR_212_T_TXF_A CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 8C, 15, 00 RF_CLIF_CFG_BR_212_T_TXF_A CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 92, 42, 90, 10, FF, FF RF_CLIF_CFG_BR_424_T_TXF_A CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 92, 4A, 31, 07, 01, 07 RF_CLIF_CFG_BR_424_T_TXF_A CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 92, 16, 00 RF_CLIF_CFG_BR_424_T_TXF_A CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 92, 15, 00 RF_CLIF_CFG_BR_424_T_TXF_A CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 03, 24, 41, 40 RF_CLIF_CFG_TECHNO_T_TXA_P CLIF_ANA_TX_CLK_CONTROL_REG
# A0, 0D, 06, 24, 42, 00, 02, FF, FF RF_CLIF_CFG_TECHNO_T_TXA_P CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 28, 41, 40 RF_CLIF_CFG_TECHNO_T_TXB CLIF_ANA_TX_CLK_CONTROL_REG
# A0, 0D, 03, 8A, 41, 40 RF_CLIF_CFG_BR_212_T_TXF_P CLIF_ANA_TX_CLK_CONTROL_REG
# A0, 0D, 03, 90, 41, 40 RF_CLIF_CFG_BR_424_T_TXF_P CLIF_ANA_TX_CLK_CONTROL_REG
# A0, 0D, 06, 0A, 30, C8, 00, 64, 00 RF_CLIF_CFG_I_ACTIVE CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 0A, 2F, AF, 05, 80, 17 RF_CLIF_CFG_I_ACTIVE CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 03, 0A, 48, 10 RF_CLIF_CFG_I_ACTIVE CLIF_ANA_CLK_MAN_REG
# A0, 0D, 06, 0A, 44, A3, 90, 03, 00 RF_CLIF_CFG_I_ACTIVE CLIF_ANA_RX_REG
# A0, 0D, 06, 0A, 34, 26, 65, E5, 03 RF_CLIF_CFG_I_ACTIVE CLIF_AGC_CONFIG1_REG
# A0, 0D, 06, 0A, 33, 0F, 01, 00, 70 RF_CLIF_CFG_I_ACTIVE CLIF_AGC_CONFIG0_REG
#
# *** ALMSL FW VERSION = 10.01.16 ***
NXP_RF_CONF_BLK_1={
20, 02, F8, 20,
A0, 0D, 03, 00, 47, 02,
A0, 0D, 03, 00, 40, 03,
A0, 0D, 06, 00, FF, 05, 04, 06, 00,
A0, 0D, 03, 04, 43, 20,
A0, 0D, 06, 04, 35, F4, 01, F4, 01,
A0, 0D, 06, 04, FF, 05, 00, 00, 00,
A0, 0D, 06, 06, 44, A3, 90, 03, 00,
A0, 0D, 06, 06, 34, F7, 7F, 00, 10,
A0, 0D, 06, 06, 33, 07, 40, 00, 00,
A0, 0D, 06, 06, 30, C8, 00, 64, 00,
A0, 0D, 06, 06, 2F, AF, 05, 80, 17,
A0, 0D, 06, 06, 03, 00, 71, 00, 20,
A0, 0D, 03, 06, 43, 20,
A0, 0D, 06, 06, 42, 00, 00, F2, F2,
A0, 0D, 03, 06, 41, 40,
A0, 0D, 03, 06, 37, 08,
A0, 0D, 03, 06, 16, 00,
A0, 0D, 03, 06, 15, 00,
A0, 0D, 06, 06, 35, 00, 02, 00, 02,
A0, 0D, 03, 06, 3F, 04,
A0, 0D, 03, 06, 80, 03,
A0, 0D, 06, 06, FF, 05, 00, 00, 00,
A0, 0D, 03, 07, 3F, 00,
A0, 0D, 06, 18, 34, 00, 00, E1, 03,
A0, 0D, 06, 18, 33, 0F, 83, 00, 00,
A0, 0D, 06, 1C, 34, 00, 00, E1, 03,
A0, 0D, 06, 1C, 33, 0F, 83, 00, 00,
A0, 0D, 06, 20, 4A, 00, 00, 00, 00,
A0, 0D, 06, 20, 42, 88, 10, FF, FF,
A0, 0D, 03, 20, 16, 00,
A0, 0D, 03, 20, 15, 00,
A0, 0D, 04, 22, 44, 22, 00
}
NXP_RF_CONF_BLK_2={
20, 02, FB, 20,
A0, 0D, 06, 22, 2D, 50, 44, 0C, 00,
A0, 0D, 04, 32, 03, 40, 3D,
A0, 0D, 06, 32, 42, F8, 10, FF, FF,
A0, 0D, 03, 32, 16, 00,
A0, 0D, 03, 32, 15, 01,
A0, 0D, 03, 32, 0D, 22,
A0, 0D, 03, 32, 14, 22,
A0, 0D, 06, 32, 4A, 33, 07, 00, 08,
A0, 0D, 06, 34, 2D, 24, C7, 0C, 00,
A0, 0D, 06, 34, 34, 00, 00, EC, 03,
A0, 0D, 06, 34, 33, 0F, 01, 01, 70,
A0, 0D, 04, 34, 44, 22, 00,
A0, 0D, 06, 38, 4A, 33, 07, 00, 08,
A0, 0D, 06, 38, 42, 68, 10, FF, FF,
A0, 0D, 03, 38, 16, 00,
A0, 0D, 03, 38, 15, 00,
A0, 0D, 04, 3A, 44, 26, 00,
A0, 0D, 06, 3A, 2D, 15, 47, 0D, 00,
A0, 0D, 06, 3A, 34, 00, 00, E1, 03,
A0, 0D, 06, 3A, 33, 0B, 83, 00, 00,
A0, 0D, 06, 3C, 4A, 52, 07, 00, 1B,
A0, 0D, 06, 3C, 42, 68, 10, FF, FF,
A0, 0D, 03, 3C, 16, 00,
A0, 0D, 03, 3C, 15, 00,
A0, 0D, 04, 3E, 44, 26, 00,
A0, 0D, 06, 3E, 2D, 15, 47, 0D, 00,
A0, 0D, 06, 3E, 34, 00, 00, E1, 03,
A0, 0D, 06, 3E, 33, 0B, 83, 00, 00,
A0, 0D, 06, 40, 42, F0, 10, FF, FF,
A0, 0D, 03, 40, 0D, 02,
A0, 0D, 03, 40, 14, 02,
A0, 0D, 06, 40, 4A, 12, 07, 00, 00
}
NXP_RF_CONF_BLK_3={
20, 02, F7, 20,
A0, 0D, 03, 40, 16, 00,
A0, 0D, 03, 40, 15, 00,
A0, 0D, 04, 42, 44, 26, 00,
A0, 0D, 06, 42, 2D, 15, 47, 0D, 00,
A0, 0D, 06, 42, 34, 00, 00, E1, 03,
A0, 0D, 06, 42, 33, 0B, 83, 00, 00,
A0, 0D, 04, 46, 44, 26, 00,
A0, 0D, 06, 46, 2D, 15, 25, 0D, 00,
A0, 0D, 06, 44, 4A, 21, 07, 00, 07,
A0, 0D, 06, 44, 42, 88, 10, FF, FF,
A0, 0D, 03, 44, 16, 00,
A0, 0D, 03, 44, 15, 00,
A0, 0D, 04, 4A, 44, 21, 00,
A0, 0D, 06, 4A, 2D, 15, 9D, 0D, 00,
A0, 0D, 06, 48, 4A, 21, 07, 00, 07,
A0, 0D, 06, 48, 42, 88, 10, FF, FF,
A0, 0D, 03, 48, 16, 00,
A0, 0D, 03, 48, 15, 00,
A0, 0D, 04, 4E, 44, 26, 00,
A0, 0D, 06, 4E, 2D, 15, 25, 0D, 00,
A0, 0D, 06, 4C, 4A, 21, 07, 00, 07,
A0, 0D, 06, 4C, 42, 88, 10, FF, FF,
A0, 0D, 03, 4C, 16, 00,
A0, 0D, 03, 4C, 15, 00,
A0, 0D, 04, 52, 44, 26, 00,
A0, 0D, 06, 52, 2D, 15, 25, 0D, 00,
A0, 0D, 06, 50, 42, 90, 10, FF, FF,
A0, 0D, 06, 50, 4A, 21, 07, 00, 07,
A0, 0D, 03, 50, 16, 00,
A0, 0D, 03, 50, 15, 00,
A0, 0D, 06, 56, 2D, 05, 9E, 0C, 00,
A0, 0D, 04, 56, 44, 22, 00
}
NXP_RF_CONF_BLK_4={
20, 02, FB, 1E,
A0, 0D, 06, 5C, 2D, 05, 9E, 0C, 00,
A0, 0D, 04, 5C, 44, 26, 00,
A0, 0D, 06, 54, 42, 88, 10, FF, FF,
A0, 0D, 06, 54, 4A, 33, 07, 01, 07,
A0, 0D, 03, 54, 16, 00,
A0, 0D, 03, 54, 15, 00,
A0, 0D, 06, 5A, 42, 90, 10, FF, FF,
A0, 0D, 06, 5A, 4A, 31, 07, 01, 07,
A0, 0D, 03, 5A, 16, 00,
A0, 0D, 03, 5A, 15, 00,
A0, 0D, 06, 98, 2F, CF, 05, 80, 17,
A0, 0D, 06, 98, 42, 00, 00, F2, F2,
A0, 0D, 06, 9A, 42, 00, 00, FF, FF,
A0, 0D, 06, 30, 44, 12, 90, 03, 00,
A0, 0D, 06, 6C, 44, A3, 90, 03, 00,
A0, 0D, 06, 6C, 30, CF, 00, 08, 00,
A0, 0D, 06, 6C, 2F, 8F, 05, 80, 0C,
A0, 0D, 06, 70, 2F, 8F, 05, 80, 12,
A0, 0D, 06, 70, 30, CF, 00, 08, 00,
A0, 0D, 03, 70, 2E, 40,
A0, 0D, 03, 70, 45, 30,
A0, 0D, 06, 70, 44, A3, 90, 03, 00,
A0, 0D, 06, 74, 2F, 6F, 05, 80, 12,
A0, 0D, 06, 74, 30, D5, 00, 40, 00,
A0, 0D, 06, 74, 44, A3, 90, 03, 00,
A0, 0D, 06, 78, 2F, 3F, 07, 80, C1,
A0, 0D, 06, 78, 30, 50, 00, 10, 00,
A0, 0D, 06, 78, 44, A3, 90, 03, 00,
A0, 0D, 06, 7C, 2F, CF, 05, 80, 17,
A0, 0D, 06, 7C, 30, C8, 00, 64, 00
}
NXP_RF_CONF_BLK_5={
20, 02, F7, 1F,
A0, 0D, 06, 7C, 44, A3, 90, 03, 00,
A0, 0D, 06, 80, 2F, CF, 05, 80, 17,
A0, 0D, 06, 80, 30, C8, 00, 64, 00,
A0, 0D, 06, 80, 44, A3, 90, 03, 00,
A0, 0D, 06, 84, 2F, CF, 05, 80, 17,
A0, 0D, 06, 84, 30, C8, 00, 64, 00,
A0, 0D, 06, 84, 44, A3, 90, 03, 00,
A0, 0D, 06, 88, 2F, B1, 05, 80, 17,
A0, 0D, 06, 88, 30, A8, 00, 64, 00,
A0, 0D, 06, 88, 44, A3, 90, 03, 00,
A0, 0D, 06, 8E, 44, 12, 90, 03, 00,
A0, 0D, 06, 94, 44, 12, 90, 03, 00,
A0, 0D, 03, 10, 43, 20,
A0, 0D, 06, 6A, 42, F8, 10, FF, FF,
A0, 0D, 03, 6A, 16, 00,
A0, 0D, 03, 6A, 15, 01,
A0, 0D, 06, 6A, 4A, 30, 0F, 01, 1F,
A0, 0D, 06, 8C, 42, 88, 10, FF, FF,
A0, 0D, 06, 8C, 4A, 33, 07, 01, 07,
A0, 0D, 03, 8C, 16, 00,
A0, 0D, 03, 8C, 15, 00,
A0, 0D, 06, 92, 42, 90, 10, FF, FF,
A0, 0D, 06, 92, 4A, 31, 07, 01, 07,
A0, 0D, 03, 92, 16, 00,
A0, 0D, 03, 92, 15, 00,
A0, 0D, 03, 24, 41, 40,
A0, 0D, 06, 24, 42, 00, 00, F2, F2,
A0, 0D, 03, 28, 41, 40,
A0, 0D, 03, 8A, 41, 40,
A0, 0D, 03, 90, 41, 40,
A0, 0D, 06, 0A, 30, C8, 00, 64, 00
}
NXP_RF_CONF_BLK_6={
20, 02, 53, 07,
A0, 0D, 06, 0A, 2F, AF, 05, 80, 17,
A0, 0D, 03, 0A, 48, 10,
A0, 0D, 06, 0A, 44, A3, 90, 03, 00,
A0, 0D, 06, 0A, 34, 26, 65, E5, 03,
A0, 0D, 06, 0A, 33, 0F, 01, 00, 70,
A0, 1D, 11, 53, 33, 14, 17, 00, AA, 85, 00, 80, 55, 2A, 04, 00, 63, 00, 00, 00,
A0, 1E, 11, 1B, 13, 14, 14, 00, 6F, 97, 00, 00, 00, 10, 04, 00, 63, 02, 00, 00
}
###############################################################################
# Core configuration extensions
# It includes
# A002 - Disable/Enable Clock Request
# A009 - Time-out before standby
# A012 - NFCEE interface 2 configuration
# A040 - Low Power Card Detector Enable
# A041 - Low Power Card Detector Threshold
# A042 - Low Power Card Detector Sampling
# A043 - Low Power Card Detector Hybrid
# A05E - Send RID automatically in Jewel Reader mode
# A061 - Retry after LPCD
# A096 - Notify all AIDs
# A0DD - Retry on SWP2 interface
# A0EC - Disable/Enable SWP1 interface
# A0ED - Disable/Enable SWP2 interface
# A0F2 - SVDD_PWR_REQ enable
NXP_CORE_CONF_EXTN={20, 02, 3A, 0E,
A0, 02, 01, 01,
A0, 09, 02, E8, 03,
A0, 12, 01, 00,
A0, 40, 01, 01,
A0, 41, 01, 05,
A0, 42, 01, 0F,
A0, 43, 01, 03,
A0, 5E, 01, 01,
A0, 61, 01, 53,
A0, 96, 01, 01,
A0, DD, 01, 2D,
A0, EC, 01, 00,
A0, ED, 01, 00,
A0, F2, 01, 00
}
###############################################################################
# Core configuration settings
# It includes
# 18 - Poll Mode NFC-F: PF_BIT_RATE
# 21 - Poll Mode ISO-DEP: PI_BIT_RATE
# 28 - Poll Mode NFC-DEP: PN_NFC_DEP_SPEED
# 30 - Lis. Mode NFC-A: LA_BIT_FRAME_SDD
# 31 - Lis. Mode NFC-A: LA_PLATFORM_CONFIG
# 33 - Lis. Mode NFC-A: LA_NFCID1
# 50 - Lis. Mode NFC-F: LF_PROTOCOL_TYPE
# 54 - Lis. Mode NFC-F: LF_CON_BITR_F
# 5B - Lis. Mode ISO-DEP: LI_BIT_RATE
# 60 - Lis. Mode NFC-DEP: LN_WT
# 80 - Other Param.: RF_FIELD_INFO
# 81 - Other Param.: RF_NFCEE_ACTION
# 82 - Other Param.: NFCDEP_OP
NXP_CORE_CONF={20, 02, 2B, 0D,
18, 01, 01,
21, 01, 00,
28, 01, 00,
30, 01, 08,
31, 01, 03,
33, 04, 01, 02, 03, 04,
50, 01, 02,
54, 01, 06,
5B, 01, 00,
60, 01, 0E,
80, 01, 01,
81, 01, 01,
82, 01, 0E
}